Interfacing Processors and Peripherals

12/1/98


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Table of Contents

Interfacing Processors and Peripherals

PPT Slide

I/O Devices

Interfacing Processors and Peripherals

What’s a bus ?

Advantages of Buses

Disadvantage of Buses

The General Organization of a Bus

Master versus Slave

Types of Buses

Backplane Bus

A Two-Bus System

A Three-Bus System

Example: Pentium System Organization

Synchronous and Asynchronous Bus

Arbitration: Obtaining Access to the Bus

Bus arbitration (contd)

Daisy Chain Bus Arbitration Scheme

Centralized Parallel Arbitration

Typical Synchronous Protocol

Increasing the Bus Bandwidth

1993 Memory Bus Survey

I/O Buses: Asynchronous Handshake

Read Transaction

1993 Backplane/IO Bus Survey

Summary of Bus Options

Operating systems issues

DMA

Author: Shivkumar Kalyanaraman

Email: shivkuma@ecse.rpi.edu

Home Page: http://www.ecse.rpi.edu/Homepages/shivkuma