/* testing shell for biquad IIR filter for real data
  (input, output from DM ports using Timer to create sampling interval)
  (link this with architecture description "iirirq.ach" )

  Analog Devices, Inc.
  DSP Applications
  P. O. Box 9106
  Norwood, MA 02062

  Chris Cavigioli
  25-Jan-1990, modified 3-May-1990, 27-June-1990
  modified 28-July-1990 for cascaded biquads
  modified 31-July-1990, 21-Aug-1990 for Timer_Hi_Prior and .ach
  modified 7-Nov-1990 to use delayed branching on subroutine calls
  modified 18-Feb-1991 for examples release
*/
.extern __cascaded_biquad_, __cascaded_biquad_init_;
.global coefs, dline;
.precision=40;
.round_nearest;
#define SAMPLES 300
#define SECTIONS 3

#include "sreg.h"           /* bit placements in ADSP-21020 system registers */
#include "waits.h"          /* PMWAIT, DMWAIT initialization aids */

/*   ADSP-21020 Interrupt Vector Table 

    should map to: PM[0x00]
                       .
                       .
                   PM[0xFF]

    jumps execution to "begin" (which is typically at PM[0x100])
*/

.segment/pm   IRQtable;

Reserved_1:     rti; nop; nop; nop; nop; nop; nop; nop;     /*  0 non-maskable */
Chip_Reset:     jump begin; 
                     nop; nop; nop; nop; nop; nop; nop;     /*  1 non-maskable */
Reserved_2:     rti; nop; nop; nop; nop; nop; nop; nop;     /*  2 */
Stack_Error:    rti; nop; nop; nop; nop; nop; nop; nop;     /*  3 */
Timer_Hi_Prior: jump new_sample; 
                     nop; nop; nop; nop; nop; nop; nop;     /*  4 */
IRQ3_Asserted:  rti; nop; nop; nop; nop; nop; nop; nop;     /*  5 */
IRQ2_Asserted:  rti; nop; nop; nop; nop; nop; nop; nop;     /*  6 */
IRQ1_Asserted:  rti; nop; nop; nop; nop; nop; nop; nop;     /*  7 */
IRQ0_Asserted:  rti; nop; nop; nop; nop; nop; nop; nop;     /*  8 */
Reserved_3:     rti; nop; nop; nop; nop; nop; nop; nop;     /*  9 */
Reserved_4:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 10 */
Circ_Overfl_7:  rti; nop; nop; nop; nop; nop; nop; nop;     /* 11 */
Circ_Overfl_15: rti; nop; nop; nop; nop; nop; nop; nop;     /* 12 */
Reserved_5:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 13 */
Timer_Lo_Prior: rti; nop; nop; nop; nop; nop; nop; nop;     /* 14 */
Fix_Pt_Overfl:  rti; nop; nop; nop; nop; nop; nop; nop;     /* 15 */
Flt_Pt_Overfl:  rti; nop; nop; nop; nop; nop; nop; nop;     /* 16 */
Flt_Pt_Underfl: rti; nop; nop; nop; nop; nop; nop; nop;     /* 17 */
Flt_Pt_InvOp:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 18 */
Reserved_6:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 19 */
Reserved_7:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 20 */
Reserved_8:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 21 */
Reserved_9:     rti; nop; nop; nop; nop; nop; nop; nop;     /* 22 */
Reserved_10:    rti; nop; nop; nop; nop; nop; nop; nop;     /* 23 */
User_Softw_1:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 24 */
User_Softw_2:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 25 */
User_Softw_3:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 26 */
User_Softw_4:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 27 */
User_Softw_5:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 28 */
User_Softw_6:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 29 */
User_Softw_7:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 30 */
User_Softw_8:   rti; nop; nop; nop; nop; nop; nop; nop;     /* 31 */

.endseg;
.segment/dm dm_bank0;   /* selected by DMS0~ */
.var dline[SECTIONS*2];     /* these are filter delay-line storage elements:  w``, w`, NEXT w``, NEXT w`, ... */
.endseg;

.segment/dm dm_bank1;   /* selected by DMS1~ */
.var in_channel;            /* this is a memory-mapped I/O port disguised as a regular variable */
.endseg;

.segment/dm dm_bank2;   /* selected by DMS2~ */
.var out_channel;           /* this is a memory-mapped I/O port disguised as a regular variable */
.endseg;

.segment/pm pm_bank1;   /* selected by PMS1~ */
.var coefs[SECTIONS*4]="iircoefs.dat";  /* a2, a1, b2, b1, NEXT a2, NEXT a1, ... */
.endseg;

.segment/pm pm_code;      /* selected by PMS0~ */
/*--- main code to setup and get ready for filtering ---*/
begin:  pmwait = xMWAIT_Internal_Only<<xMWAIT_Mode_Bank0 | 0<<xMWAIT_Count_Bank0 \
               | xMWAIT_Internal_Only<<xMWAIT_Mode_Bank1 | 0<<xMWAIT_Count_Bank1;  
        dmwait = xMWAIT_Internal_Only<<xMWAIT_Mode_Bank0 | 0<<xMWAIT_Count_Bank0 \
               | xMWAIT_Internal_Only<<xMWAIT_Mode_Bank1 | 1<<xMWAIT_Count_Bank1 \
               | xMWAIT_Internal_Only<<xMWAIT_Mode_Bank2 | 3<<xMWAIT_Count_Bank2;  
        pmbank1=0x000800;               /* first address of pm bank 1 (PMS1~) */
        dmbank1=0x00001000;             /* first address of dm bank 1 (DMS1~) */
        dmbank2=0x00002000;             /* first address of dm bank 2 (DMS2~) */
        l0=0; l1=0; l8=0;
        m1=1; m8=1;
        call __cascaded_biquad_init_ (db);  /* zero the delay line */
        r0=SECTIONS;
        b0=dline;
        tperiod=199;                    /* reloads tcount at 100 kHz sampling interval */
        tcount=199;                     /* initialize this for the first period ! */
        bit set irptl IRPTL_Clear_All;                  /* RESET doesn`t clear this ... you do it! */
        bit set imask IMASK_Timer_Hi_Prior;             /* allow interval timer interrupts */
        bit set mode1 MODE1_Enable_Global_Interrupt;    /* allow interrupt processing in general */
        bit set mode2 MODE2_Enable_Timer;               /* turn on the interval timer */
wait:   idle;                           /* wait for interrupts here indefinitely */
        jump wait;                      /* after rti, go back to waiting for more */

/*--- interrupt service routine which does the filtering ---*/
new_sample:
        f8=dm(in_channel);              /* simulate this channel with a file */
        call __cascaded_biquad_ (db);   /* input=F8, output=F8 */
        b0=dline;
        b8=coefs;
        rti (db);
        dm(out_channel)=f8;             /* simulate this channel with a file */
        nop;
.endseg;