/*________________________________________________________________________
  ADSP-2106x DMA-driven SPORT Loopback Example:

This example sets up a SPORT DMA transfer and receive for serial port 1 in
the loopback mode. The buffer "source" is DMAed out of the sport. The
loopback mode internally attaches DT1, TFS1, and TCLK1 to DR1, RFS1 and
RCLK1. The receive DMA places the data in the buffer "destination".
________________________________________________________________________*/
#define N 8
#include "def21060.h"

.segment/dm dm32_b1;    /* Data segment name described in arch. file.*/
.var source[N]= 0x11111111, 0x22222222, 0x33333333, 0x44444444,
		0x55555555, 0x66666666, 0x77777777, 0x88888888;

.var destination[N];
.endseg;

.segment/pm rst_svc;    /* Reset vector from arch. file. first location*/
	nop;            /* is used for booting.*/
	jump start;
.endseg;

.segment/pm spr1_svc;   /* Sport 1 rx interrupt vector.*/
	jump s1rx;
.endseg;

/*____________________main routine____________________*/
.segment/pm pm48_1b0;   /* Main code segment from arch file.*/
start:  r0=source;
	dm(II3)=r0;	/* Set DMA tx index to start of source buffer.*/
	r0=destination;
	dm(II1)=r0;	/* Set DMA rx index to start of destination buffer.*/
	r0=1;
	dm(IM3)=r0;	/* Set DMA modify (stride) to 1.*/
	dm(IM1)=r0;
	r0=@source;
	dm(C3)=r0;	/* Set DMA count to length of data buffer.*/
	dm(C1)=r0;

	r0=0x004421f1;	/*   SRCTL1 Register:*/
	dm(SRCTL1)=r0;	/* SPEN=1, (Sport enabled)*/
			/* SLEN=31,(32-bit word)*/
			/* RFSR=1, (require RFS)*/
			/* SDEN=1, (rx DMA enable)*/
			/* SPL=1,  (loop back DT to DR & TFS to RFS)*/

	r0=0x00270007;  /*   TDIV0 Register:TCLKDIV=7, TFSDIV=39*/
	dm(TDIV1)=r0;   /* sclock=CLKIN/8, framerate=sclock/20.*/

	r0=0x000465f1;  /*   STCTL1 Register:*/
	dm(STCTL1)=r0;  /* SPEN=1, (SPORT enabled)*/
			/* SLEN=31,(32-bit word)*/
			/* ICLK=1, (internal tx clock)*/
			/* TFSR=1, (require TFS)*/
			/* ITFS=1, (internal TFS)*/
			/* DITFS=0,(data dependent FS), all other bits=0*/
			/* SDEN=1, (tx dma enablea), this kicks it off*/

	bit set imask SPR1I;    /* Enable sport 1 rx interrupt.*/
	bit set mode1 IRPTEN;   /* Global interrupt enable.*/

wait:   idle;           /* Wait for SPORT1 rx interrupt.*/
	jump wait;	/* Will end up here after entire DMA complete.*/

/*_________________SPORT 1 Receive Interrupt Routine___________________*/
s1rx:   rti;		/* This interrupt will occur only once.*/

.endseg;