;-----------------------------------------------------------------------------
;
; 	FILE NAME  	: MEM_TEST.ASM 
; 	TARGET MCU	: C8051F020
; 	DESCRIPTION	: This program disables the watchdog timer and writes value in
;									acc A to address pointed to by DPTR in external SRAM on 
;									plug-in board AB1. 
;
;  	NOTES:
;	(1)	/WE    = P4.7 (/WR)
;	(2) /CE    = P4.4 (J1 closed on AB1 board)
;	(3) /OE    = P4.6 (/RD)
;	(4) D0-D7  = P7.0-P7.7 (DATA bus)
;	(5) A0-A7  = P6.0-P6.7 (ADR bus lo byte)
;	(6) A8-A15 = P5.0-P5.7 (ADR bus hi byte)
;	(7) A16    = P4.5 (BANK select)
;
;
;-----------------------------------------------------------------------------

$include (c8051F020.inc)               ; Include register definition file

;-----------------------------------------------------------------------------
; EQUATES
;-----------------------------------------------------------------------------


;-----------------------------------------------------------------------------
; VARIABLES
;-----------------------------------------------------------------------------
	
																
;-----------------------------------------------------------------------------
; RESET and INTERRUPT VECTORS
;-----------------------------------------------------------------------------

; Reset Vector
               org   00h					
               ljmp  Main              

;-----------------------------------------------------------------------------
; CODE SEGMENT
;-----------------------------------------------------------------------------

Main:		; Disable the WDT. (IRQs not enabled at this point.)
				; If interrupts were enabled, we would need to explicitly 
				; disable them so that the 2nd move to WDTCN occurs no more 
				; than four clock cycles after the first move to WDTCN.

				mov   WDTCN, #0DEh
				mov   WDTCN, #0ADh
; set up the XBAR
				mov	  XBR2,  #42h		;weak pull-ups, XBAR enabled,
														;non-multiplexed mode
				mov   EMI0CF, #3Fh	;EMIF active on P4-P7, EMIF in non-multi-
														;plexed mode, external XRAM only
				
start:	mov   A, #0CFh			;clr P4.4 for /CE, P4.5 lo for lower 64k of
														;external 128k SRAM (bank1)
				mov   P4, A					;enable external /CE & lower 64k SRAM
				clr   A
				mov   R0, #055h			;value to write into SRAM
				mov   A, R0					;load write value
				mov   DPTR, #0000h	;start at addr $00000
loop:		movx  @DPTR, A			;write to SRAM
				movx  A, @DPTR			;read SRAM value
				cjne  A, 00h, error	;compare rd/wr, jump if error		
				inc   DPTR
				mov   A, DPH
				orl   A, DPL
				jz    b155done
				mov   A, R0
				jmp   loop

b155done:		mov   A, #0EFh	;clr P4.4 for /CE, P4.5 hi for upper 64k of
														;external 128k SRAM (bank2)
				mov   P4, A					;enable external /CE & upper 64K SRAM
				clr   A
				mov   A, R0
				mov   DPTR, #0000h	;start at addr $10000
loop1:	movx  @DPTR, A
				movx  A, @DPTR			;read SRAM value
				cjne  A, 00h, error	;compare rd/wr, jump if error		
				inc   DPTR
				mov   A, DPH
				orl   A, DPL
				jz    b255done
				mov   A, R0
				jmp   loop1

b255done:		mov   A, #0CFh	;clr P4.4 for /CE, P4.5 lo for lower 64k of
														;external 128k SRAM (bank1)
				mov   P4, A					;enable external /CE & lower 64k SRAM
				clr   A
				mov   R0, #0AAh			;value to write into SRAM
				mov   A, R0					;load write value
				mov   DPTR, #0000h	;start at addr $00000
loop2:	movx  @DPTR, A
				movx  A, @DPTR			;read SRAM value
				cjne  A, 00h, error	;compare rd/wr, jump if error		
				inc   DPTR
				mov   A, DPH
				orl   A, DPL
				jz    b1AAdone
				mov   A, R0
				jmp   loop2

b1AAdone:		mov   A, #0EFh	;clr P4.4 for /CE, P4.5 hi for upper 64k of
														;external 128k SRAM (bank2)
				mov   P4, A					;enable external /CE & upper 64K SRAM
				clr   A
				mov   A, R0
				mov   DPTR, #0000h	;start at addr $10000
loop3:	movx  @DPTR, A
				movx  A, @DPTR			;read SRAM value
				cjne  A, 00h, error	;compare rd/wr, jump if error		
				inc   DPTR
				mov   A, DPH
				orl   A, DPL
				jz    b2AAdone
				mov   A, R0
				jmp   loop3

b2AAdone:	jmp   start
error:		jmp   $						;error occured	


;-----------------------------------------------------------------------------
; End of file.

END