//----------------------------------------------------------------------------- // F12x_INIT_2.c //----------------------------------------------------------------------------- // Copyright 2002 Cygnal Integrated Products, Inc. // // AUTH: FB // DATE: 19 SEP 02 // // This file contains example initialization routines for the C8051F12x series // of devices. // // This program uses a 22.1184 Mhz crystal oscillator multiplied by (9/4) // for an effective SYSCLK of 49.7664 Mhz. This program also initializes and // uses UART0 at bits per second. // // // Target: C8051F12x // Tool chain: KEIL C51 6.03 / KEIL EVAL C51 // //----------------------------------------------------------------------------- // Includes //----------------------------------------------------------------------------- #include // SFR declarations #include // printf() and getchar() //----------------------------------------------------------------------------- // 16-bit SFR Definitions for 'F12x //----------------------------------------------------------------------------- sfr16 DP = 0x82; // data pointer sfr16 ADC0 = 0xbe; // ADC0 data sfr16 ADC0GT = 0xc4; // ADC0 greater than window sfr16 ADC0LT = 0xc6; // ADC0 less than window sfr16 RCAP2 = 0xca; // Timer2 capture/reload sfr16 RCAP3 = 0xca; // Timer3 capture/reload sfr16 RCAP4 = 0xca; // Timer4 capture/reload sfr16 TMR2 = 0xcc; // Timer2 sfr16 TMR3 = 0xcc; // Timer3 sfr16 TMR4 = 0xcc; // Timer4 sfr16 DAC0 = 0xd2; // DAC0 data sfr16 DAC1 = 0xd2; // DAC1 data sfr16 PCA0CP5 = 0xe1; // PCA0 Module 5 capture sfr16 PCA0CP2 = 0xe9; // PCA0 Module 2 capture sfr16 PCA0CP3 = 0xeb; // PCA0 Module 3 capture sfr16 PCA0CP4 = 0xed; // PCA0 Module 4 capture sfr16 PCA0 = 0xf9; // PCA0 counter sfr16 PCA0CP0 = 0xfb; // PCA0 Module 0 capture sfr16 PCA0CP1 = 0xfd; // PCA0 Module 1 capture //----------------------------------------------------------------------------- // Global CONSTANTS //----------------------------------------------------------------------------- #define TRUE 1 #define FALSE 0 #define EXTCLK 22118400 // External oscillator frequency in Hz #define SYSCLK 49760000 // Output of PLL derived from // (EXTCLK*9/4) #define BAUDRATE 115200 // Baud rate of UART in bps // Note: The minimum standard baud rate // supported by the UART0_Init routine // in this file is 19,200 bps when // SYSCLK = 49.76MHz. sbit LED = P1^6; // LED='1' means ON sbit SW2 = P3^7; // SW2='0' means switch pressed //----------------------------------------------------------------------------- // Function PROTOTYPES //----------------------------------------------------------------------------- void main(void); void SYSCLK_Init(void); void PORT_Init(void); void UART0_Init (void); //----------------------------------------------------------------------------- // MAIN Routine //----------------------------------------------------------------------------- void main (void) { WDTCN = 0xde; // disable watchdog timer WDTCN = 0xad; PORT_Init (); // initialize crossbar and GPIO SYSCLK_Init (); // initialize oscillator UART0_Init (); // initialize UART0 SFRPAGE = UART0_PAGE; // Direct printf output to UART0 printf("Hello\n"); // Print a string while(1); } //----------------------------------------------------------------------------- // Initialization Routines //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // SYSCLK_Init //----------------------------------------------------------------------------- // // This routine initializes the system clock to use an external 22.1184 MHz // crystal oscillator multiplied by a factor of 9/4 using the PLL as its // clock source. The resulting frequency is 22.1184 MHz * 9/4 = 49.7664 MHz // void SYSCLK_Init (void) { int i; // delay counter char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page SFRPAGE = CONFIG_PAGE; // set SFR page OSCXCN = 0x67; // start external oscillator with // 22.1184MHz crystal for (i=0; i < 256; i++) ; // Wait for osc. to start up while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle CLKSEL = 0x01; // Select the external osc. as // the SYSCLK source OSCICN = 0x00; // Disable the internal osc. //Turn on the PLL and increase the system clock by a factor of M/N = 9/4 SFRPAGE = CONFIG_PAGE; PLL0CN = 0x04; // Set PLL source as external osc. SFRPAGE = LEGACY_PAGE; FLSCL = 0x10; // Set FLASH read time for 50MHz clk // or less SFRPAGE = CONFIG_PAGE; PLL0CN |= 0x01; // Enable Power to PLL PLL0DIV = 0x04; // Set Pre-divide value to N (N = 4) PLL0FLT = 0x01; // Set the PLL filter register for // a reference clock from 19 - 30 MHz // and an output clock from 45 - 80 MHz PLL0MUL = 0x09; // Multiply SYSCLK by M (M = 9) for (i=0; i < 256; i++) ; // Wait at least 5us PLL0CN |= 0x02; // Enable the PLL while(!(PLL0CN & 0x10)); // Wait until PLL frequency is locked CLKSEL = 0x02; // Select PLL as SYSCLK source SFRPAGE = SFRPAGE_SAVE; // Restore SFR page } //----------------------------------------------------------------------------- // PORT_Init //----------------------------------------------------------------------------- // // This routine configures the crossbar and GPIO ports. // void PORT_Init (void) { char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page SFRPAGE = CONFIG_PAGE; // set SFR page XBR0 = 0x04; // Enable UART0 XBR1 = 0x00; XBR2 = 0x40; // Enable crossbar and weak pull-up P0MDOUT |= 0x01; // Set TX0 pin to push-pull P1MDOUT |= 0x40; // Set P1.6(LED) to push-pull SFRPAGE = SFRPAGE_SAVE; // Restore SFR page } //----------------------------------------------------------------------------- // UART0_Init //----------------------------------------------------------------------------- // // Configure the UART0 using Timer1, for and 8-N-1. In order to // increase the clocking flexibility of Timer0, Timer1 is configured to count // SYSCLKs. // // To use this routine SYSCLK/BAUDRATE/16 must be less than 256. For example, // if SYSCLK = 50 MHz, the lowest standard baud rate supported by this // routine is 19,200 bps. // void UART0_Init (void) { char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page SFRPAGE = UART0_PAGE; SCON0 = 0x50; // SCON0: mode 0, 8-bit UART, enable RX SSTA0 = 0x10; // Timer 1 generates UART0 baud rate and // UART0 baud rate divide by two disabled SFRPAGE = TIMER01_PAGE; TMOD &= ~0xF0; TMOD |= 0x20; // TMOD: timer 1, mode 2, 8-bit reload TH1 = -(SYSCLK/BAUDRATE/16); // Set the Timer1 reload value // When using a low baud rate, this equation // should be checked to ensure that the // reload value will fit in 8-bits. CKCON |= 0x10; // T1M = 1; SCA1:0 = xx TL1 = TH1; // initialize Timer1 TR1 = 1; // start Timer1 SFRPAGE = UART0_PAGE; TI0 = 1; // Indicate TX0 ready SFRPAGE = SFRPAGE_SAVE; // Restore SFR page }