Parallel Ports

These ports have check boxes for pins programmed as inputs and display boxes for pins programmed as outputs. Outputs are not updated while simulations are running, however inputs are active when simulations are running via the "Go" or "Step Over" buttons.

The ports displayed depend on the processor operating mode, with ports J and H being generally available, port D added for Narrow Memory mode, and ports A and B additionally added for Single Chip mode. In the case of the 68HC912B32, only ports A and B are provided.

When the Log Changes box is checked, any changes to the outputs are logged, giving their time (in E/P clocks) and new value. The logging line looks like this:


Where PORTH is the event name (Port H output changed), 10022 is the time, 34 is the value in decimal, and 22 is the value in hexadecimal.

When the key wakeup interrupt feature is used, the interrupts are edge sensitive and won't be captured until the next P-clock. Key wakeup on port D uses the same interrupt as the External interrupt pin.