/* Copyright Motorola, Inc. 1993, 1994, 1999, 2000 ALL RIGHTS RESERVED You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE so long as this entire notice is retained without alteration in any modified and/or redistributed versions, and that such modified versions are clearly identified as such. No licenses are granted by implication, estoppel or otherwise under any patents or trademarks of Motorola, Inc. The SOFTWARE is provided on an "AS IS" basis and without warranty. To the maximum extent permitted by applicable law, MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) AND ANY ACCOMPANYING WRITTEN MATERIALS. To the maximum extent permitted by applicable law, IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. Motorola assumes no responsibility for the maintenance and support of the SOFTWARE. */ /* config_messages.c functions to decode each config register * * All the informational messages for decoding bits and fields. * * mo 6/2/00 * */ /* Includes */ #include "config_decoder.h" char msg00MS0[]="Do not respond to PCI memory accesses"; char msg00MS1[]="Respond to PCI memory accesses"; char msg00BM0[]="Host mode"; char msg00BM1[]="Agent mode"; char msg00MW0[]="Use Memory Write"; char msg00MW1[]="Use Memory Write and Invalidate"; char msg00PE0[]="Parity errors are ignored"; char msg00PE1[]="Parity errors take action"; char msg00SEER0[]="SERR driver disabled"; char msg00SEER1[]="SERR driver enabled"; char msg00MH660[]="Not 66-MHz capable"; char msg00MH661[]="66-MHz capable"; char msg00DPD0[]="No Data Partity detected"; char msg00DPD1[]="Data Partity detected"; char msg00ST0[]="No PCI target abort issued"; char msg00ST1[]="Target issued abort to PCi master"; char msg00RT0[]="No PCI target abort received"; char msg00RT1[]="Target terminated PCI abort"; char msg00RMA0[]="No PCI master abort"; char msg00RMA1[]="PCI master issued PCI abort"; char msg00SSE0[]="SEER not asserted"; char msg00SSE1[]="SEER is asserted"; char msg00DPE0[]="Parity Error not detected"; char msg00DPE1[]="Parity Error is detected"; char msg04RDL0[]="MPC106 V3.0 mode"; char msg04RDL1[]="MPC106 V4.0 mode"; char msg08SPI0[]="Host bridge"; char msg08SPI1[]="Agent device with the I2O"; char msg08SBC6[]="Host bridge"; char msg08SBCe[]="Target device with I2O"; char msg10PF0[]="Not prefetchable"; char msg10PF1[]="Prefetchable"; char msg44PL0[]="Low"; char msg44PL1[]="High"; char msg44RT0[]="PCI target responds to external PCI"; char msg44RT1[]="PCI target retries all external PCI"; char msg44PM0[]="the last device"; char msg44PM1[]="device using REQ0* and GNT0*"; char msg44PM2[]="MPC107"; char msg44EA0[]="Internal Arbiter disabled."; char msg44EA1[]="Internal Arbiter enabled."; char msg48CMDT0[]="Use Table 12"; char msg48CMDT1[]="Use Table 13"; char msg48C0[]="PMC0"; char msg48C1[]="PMC1"; char msg48C2[]="PMC2"; char msg48C3[]="PMC3"; char msg4cPMC0[]="enable counters ignore msb"; char msg4cPMC1[]="disable counters until msb"; char msg4cDISC0[]="counters continue to increment"; char msg4cDISC1[]="PMC0 stops"; char msg70LP0[]="Don't perform mem refresh in SLEEP"; char msg70LP1[]="Perform mem refresh in SLEEP"; char msg70SQ0[]="QACK* not asserted in suspend mode"; char msg70SQ1[]="QACK* is asserted in suspend mode"; char msg70PM0[]="Disabled"; char msg70PM1[]="Enabled"; char msg70BR0[]="Ignored during nap and sleep"; char msg70BR1[]="Wake up during nap and sleep"; char msg70DZ0[]="Disables Doze mode"; char msg70DZ1[]="Enables Doze mode"; char msg70NP0[]="Disables Nap mode"; char msg70NP1[]="Enables Nap mode"; char msg70SP0[]="Disables Sleep mode"; char msg70SP1[]="Enables Sleep mode"; char msg70CKM0[]="Disable the test clock driver"; char msg70CKM1[]="Select inernal sys_lgic_clk"; char msg70CKM2[]="Select one-half PCI rate clock"; char msg70CKM3[]="Select PCI rate clock"; char msg70PSS0[]="Does not sample PLL"; char msg70PSS1[]="Does sample PLL"; char msg70PHD0[]="Recommened for 66Mhz"; char msg70PHD1[]=""; char msg70PHD4[]="Recommended for 33"; char msg70PHD6[]="Default if reset pins no connect"; char msg70DE0[]="DLL extended range"; char msg70DE1[]="Standard (non_extended) range"; char msg70DMC0[]="40 ohm drive capability"; char msg70DMC1[]="20 ohm drive capability"; char msg70DMC2[]="13.3 ohm drive capability"; char msg70DMC3[]="8 ohm drive capability"; char msg70DCPU0[]="High drive capability"; char msg70DCPU1[]="Medium drive capability"; char msg70SMCP0[]="Always drive MPC*"; char msg70SMCP1[]="High Impedence except on error"; char msg70SMCP2[]="Tristate except on error"; char msg70NED0[]="Not Required"; char msg70NED1[]="Required"; char msg70NO60[]="No"; char msg70NO61[]="Yes"; char msg70SMT0[]="Broadcast HALT"; char msg70SMT1[]="Broadcast SHUTDOWN"; char msg70NS0[]="Broadcast SLEEP"; char msg70NS1[]="Does not broadcast SLEEP"; char msg70NN0[]="Broadcast HALT"; char msg70NN1[]="Does not broadcast HALT"; char msg70CK0[]="Processor clock"; char msg70CK1[]="System logic clock"; char msg73DMC1[]="20 ohm control"; char msg73DMC2[]="13 ohm control"; char msg73DMC3[]="8 ohm control"; char msg73DMC4[]="40 ohm control"; char msg74CK0[]="Enabled"; char msg74CK1[]="Disabled"; char msg74HZ0[]="is always driven"; char msg74HZ1[]="high-impedance state"; char msg74OD1[]="open drain"; char msga0B0[]="Disabled"; char msga0B1[]="Enabled"; char msga8CMM0[]="Uniprocessor"; char msga8CMM1[]="Reserved do not use"; char msga8CMM3[]="Multiprocessor"; char msga8CFA0[]="No processor"; char msga8CFA1[]="Last processor"; char msga8LE0[]="Big-Endian Mode"; char msga8LE1[]="Little-Endian Mode"; char msga8NB0[]="Restricted to bus Width"; char msga8NB1[]="No restriction"; char msga8CFM0[]="0 is reading PICR1"; char msga8CFM1[]="1 is reading PICR1"; char msga8AM0[]="Map B"; char msga8AM1[]="Map A"; char msga8PT0[]="603x, 7xx, and 74xx"; char msga8PT1[]="603x"; char msga8RC0[]="PCI Bus"; char msga8RC1[]="Processor/memory data Bus"; char msga8CF0[]="0 wait state (2:1 clock)"; char msga8CF1[]="1 wait state (1:1 clk DRTRY)"; char msga8CF2[]="2 wait states (1:1 clk not DRTRY)"; char msga8CF3[]="3 wait states (not recommended)"; char msga8NPR0[]="Implemented"; char msga8NPR1[]="Not implemented"; char msga8CFD0[]="Not parked on data bus"; char msga8CFD1[]="Parked on data bus"; char msga8XIO0[]="Contiguous"; char msga8XIO1[]="Discontiguous"; char msga8CFC0[]="0 to 2 Gbyte addresses"; char msga8CFC1[]="0 to 1 Gbyte addresses"; char msgacCFA0[]="0 wait states"; char msgacCFA1[]="1 wait state"; char msgacCFA2[]="2 wait states"; char msgacCFA3[]="3 wait states"; char msgacCFB1[]="1 clock cycle"; char msgacCFB2[]="2 clock cycles"; char msgacCFB3[]="3 clock cycles"; char msgacCS1[]="1 wait state(1:1 or 3:2)"; char msgacSC0[]="No Serialization"; char msgacSC1[]="Serialization & flush buffers"; char msgacDOE0[]="1 or 2 clock cycle"; char msgacDOE1[]="2 or 3 clock cycle"; char msgacL2SZ0[]="256 Kbytes"; char msgacL2SZ1[]="512 Kbytes"; char msgacL2SZ2[]="1 Mbyte"; char msgacFSC0[]="Normal"; char msgacFSC1[]="Fast"; char msgacTWOB0[]="1 SRAM Bank"; char msgacTWOB1[]="2 SRAM Bank"; char msgacHOLD0[]="Synchronous tag RAM"; char msgacHOLD1[]="Asynchronous tag RAM"; char msgacAOD0[]="Responds"; char msgacAOD1[]="Ignore"; char msgacHIT0[]="Active low"; char msgacHIT1[]="Active high"; char msgacCFWM0[]="Normal without partial update"; char msgacCFWM1[]="Normal with partial update"; char msgacCFWM2[]="Delayed with partial update"; char msgacCFWM3[]="Early with partial update"; char msgacCVD0[]="Synchronous burst SRAM"; char msgacCVD1[]="Pipelined burst SRAM"; char msgacCVD2[]="Asynchronous SRAM"; char msgacCFF1[]="write mod lines to memory"; char msgb8T0[]="No single bit error is generated"; char msgb8T1[]="single bit error threshold"; char msgb8RXS1[]="Recognizes"; char msgc0UPT1[]="Unsupported transfer attributes"; char msgc0UPT2[]="XATS* detected"; char msgc0MRP0[]="No error detected"; char msgc0MRP1[]="Parity or ECC trigger"; char msgc0PPC0[]="on processor-init cycle"; char msgc0PPC1[]="on PCI-init cycle"; char msgc0MRO1[]="error detected"; char msgc4IEA0[]="valid"; char msgc4IEA1[]="not valid"; char msgc4MPC0[]="PCI master"; char msgc4MPC1[]="PCI target"; char msge0PRC0[]="forward to system memory"; char msge0PRC1[]="forward to PCI memory"; char msge0PCH0[]="respond"; char msge0PCH1[]="don't respond"; char msge0CFD0[]="route normally"; char msge0CFD1[]="route to PCI"; char msge4MMS0[]="Invalid"; char msge4MMS1[]="Valid same address"; char msge4MMS2[]="Valid different addresses"; char msge4MMS3[]="Valid define block address"; char msgf0BANK0[]="9 or (12 x n x 4)"; char msgf0BANK1[]="10 or (13 x n x 2)"; char msgf0BANK2[]="11 or (13 x n x 4)"; char msgf0BANK3[]="12,13 or (11 x n x 2)"; char msgf0RMT0[]="SDRAM"; char msgf0RMT1[]="DRAM or EDO RAM"; char msgf0BRST0[]="standard (non burst-mode)"; char msgf0BRST1[]="burst-mode"; char msgf0N640[]="64 bit"; char msgf0N641[]="8 bit"; char msgf0MODE50[]="16501 type buffers"; char msgf0MODE51[]="backward compatibility"; char msgf4RSV0[]="Four open page mode"; char msgf4RSV1[]="Three open page mode"; char msgf4EDO0[]="standard DRAM"; char msgf4EDO1[]="EDO DRAM"; char msgf4TS2[]="2 clocks min disable time"; char msgf4TS3[]="3 clocks min disable time"; char msgf4TS4[]="4 clocks min disable time"; char msgf4TS5[]="5 clocks min disable time"; char msgf4TS6[]="6 clocks min disable time"; char msgf4TS7[]="7 clocks min disable time"; char msgf4TS8[]="8 clocks min disable time"; char msgf4BUF0[]="BCTL0 write, BCTL1 read enable"; char msgf4BUF1[]="BCTL0 direction, BCTL1 buf enable"; char msgf8CAS0[]="Unmodified"; char msgf8CAS1[]="Modified"; char msgfcBUF0[]="Registered buffer mode"; char msgfcBUF1[]="Inline buffer mode"; char msgfcWM0[]="Four beats per burst"; char msgfcWM1[]="Eight beats per burst"; char msgfcRCBUF0[]="Flow-through"; char msgfcRCBUF1[]="Transparent or registered"; char msgfcWCBUF0[]="Flow-through or transparent"; char msgfcWCBUF1[]="Registered"; char msgfcWT0[]="Sequential"; char msgfcWT1[]="Interleaved"; char msg00X0[]=""; char msg00X1[]="";