/*	Copyright Motorola, Inc. 1993, 1994, 1999, 2000
	ALL RIGHTS RESERVED

	You are hereby granted a copyright license to use, modify, and 
	distribute the SOFTWARE so long as this entire notice is retained 
	without alteration in any modified and/or redistributed versions, 
	and that such modified versions are clearly identified as such.  
	No licenses are granted by implication, estoppel or otherwise under 
	any patents or trademarks of Motorola, Inc.

	The SOFTWARE is provided on an "AS IS" basis and without warranty.  
	To the maximum extent permitted by applicable law, MOTOROLA DISCLAIMS 
	ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING IMPLIED 
	WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR 
	PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 
	REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS 
	THEREOF) AND ANY ACCOMPANYING WRITTEN MATERIALS. 

	To the maximum extent permitted by applicable law, IN NO EVENT SHALL 
	MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 
	(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF 
	BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS 
	INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OF THE USE OR 
	INABILITY TO USE THE SOFTWARE.   Motorola assumes no responsibility 
	for the maintenance and support of the SOFTWARE.  

*/

/*  config_regs.c  functions to decode each config register
 *
 *  decode each specific configuration register
 *
 *  mo 6/2/00
 *
*/

/*  Includes  */
#include "config_decoder.h"

int Reg00(int value, int part)
{
int LEFT = 0xffff0000, RIGHT = 0xffff;
int getleft,getright;
	printf("\nReg00  Device ID and Vendor ID = 0x%08x\n",value);
	getleft=(((value&LEFT)>>16) & RIGHT); /* strip off sign extension */
	getright=value&RIGHT;
	lc++;sprintf(lh[lc],"   0x00:Vendor ID = 0x%04x ",getright);  
	if(getright != 0x1057)
	{
	     sprintf((lh[lc]+strlen(lh[lc])),"ERROR: Should be 0x1057\n");
	}
	else
	{
	     sprintf((lh[lc]+strlen(lh[lc])),"\n");
	}
        lc++;sprintf(lh[lc],"   0x02:Device ID = 0x%04x ",getleft);
	if((getleft != 0x4) && (part == PART_MPC107))
	{
	     sprintf(lh[lc]+strlen(lh[lc]),"ERROR: Should be 0x0004\n");
	}
	else if((getleft != 0x3) && (part == PART_MPC8240H))
	{
	        sprintf(lh[lc]+strlen(lh[lc]),"ERROR: Should be 0x0003\n");
	}
	else if((getleft != 0x3) && (part == PART_MPC8240A))
	{
	        sprintf(lh[lc]+strlen(lh[lc]),"ERROR: Should be 0x0003\n");
	}
	else if((getleft != 0x2) && (part == PART_MPC106)) 
	{
	     	sprintf(lh[lc]+strlen(lh[lc]),"ERROR: Should be 0x0002\n");
	}
	     else
	     {
	     	sprintf(lh[lc]+strlen(lh[lc]),"\n");
	     }
	printOrder();
return 0;
}

int Reg04(int value, int part)
{
int LEFT = 0xffff0000, RIGHT = 0xffff;
unsigned int getleft,getright,temp;
int IOS=1, MS=2, BM=4, SC=8, MW=0x10, Z1=0x20, PE=0x40, Z2=0x80,
    SERR=0x100, FB=0x200, Z3=0xfc00;
int Z4=0x1f, MH66=0x20, Z5=0x40, FBB=0x80, DPD=0x100, DEV=0xc00,
    ST=0x800, RT=0x1000, RMA=0x2000, SSE=0x4000, DPE = 0x8000;


	printf("\nReg04  PCI Status/Command = 0x%08X\n",value);
	getleft=(((value&LEFT)>>16) & RIGHT); /* strip off sign extension */
	getright=value&RIGHT;
	lc++;sprintf(lh[lc],"   0x04:PCI Command = 0x%04x\n",getleft);
	li++;lhIndex[li]=lc; /* index for 0x04 */
	temp=getleft&IOS;
	lc++;sprintf(lh[lc],"     I/O Space                     =  0x%x ",temp);
	checkZero(temp);
	temp=(getleft&MS)>>1;
	lc++;sprintf(lh[lc],"     Memory Space                  =  0x%x ",temp);
	printMsg(temp, msg00MS0,msg00MS1);
	temp=(getleft&BM)>>2;
	lc++;sprintf(lh[lc],"     Bus Master                    =  0x%x ",temp);

      if(part == PART_MPC107)
	printMsg(temp, msg00BM0,msg00BM1);
      if(part == PART_MPC106)
	printMsg(temp, msg70PM0,msg70PM1);
      if(part == PART_MPC8240H)
      {
	if(temp == 0) 
	{
	   sprintf(lh[lc]+strlen(lh[lc]),"Host mode\n");
	}
        else  
	{
           sprintf(lh[lc]+strlen(lh[lc]),
                        "Agent: ERROR: Should be host mode\n");
	}
      }
      if(part == PART_MPC8240A)
      {
	if(temp == 1) 
	{
              sprintf(lh[lc]+strlen(lh[lc]),"Agent mode\n");
	}
        else  
	{
              sprintf(lh[lc]+strlen(lh[lc]),
                        "Host: ERROR: Should be agent mode\n");
	}
      }

	temp=(getleft&SC)>>3;
	lc++;sprintf(lh[lc],"     Special Cycles                =  0x%x ",temp);
	checkZero(temp);
	temp=(getleft&MW)>>4;
	lc++;sprintf(lh[lc],"     Memory Write and Invalidate   =  0x%x ",temp);
	printMsg(temp, msg00MW0,msg00MW1);
	temp=(getleft&Z1)>>5;
	lc++;sprintf(lh[lc],"     unnamed bit 5                 =  0x%x ",temp);
	checkZero(temp);
	temp=(getleft&PE)>>6;
	lc++;sprintf(lh[lc],"     Parity Error Response         =  0x%x ",temp);
	printMsg(temp, msg00PE0,msg00PE1);
	temp=(getleft&Z2)>>7;
	lc++;sprintf(lh[lc],"     unnamed bit 7                 =  0x%x ",temp);
	checkZero(temp);
	temp=(getleft&SERR)>>8;
	lc++;sprintf(lh[lc],"     SERR                          =  0x%x ",temp);
	printMsg(temp, msg00SEER0,msg00SEER1);
	temp=(getleft&FB)>>9;
	lc++;sprintf(lh[lc],"     Fast Back to back             =  0x%x ",temp);
	checkZero(temp);

	temp=(getleft&Z3)>>10;
      if(part == PART_MPC106) decodePCI_106(temp);
      else
      {
	lc++;sprintf(lh[lc],"     unnamed bits 15-10            =  0x%x",temp);
	checkZero(temp);
      }

	lc++;sprintf(lh[lc],"   0x06:PCI Status  = 0X%04x\n",getright);
	li++;lhIndex[li]=lc; /* index for 0x04 */
	temp=getright&Z4;
	lc++;sprintf(lh[lc],"     unnamed bits 0-4              =  0x%x ",temp);
	checkZero(temp);
	temp=(getright&MH66)>>5;
	lc++;sprintf(lh[lc],"     66-MHz capable                =  0x%x ",temp);
	printMsg(temp, msg00MH660,msg00MH661);
	temp=(getright&Z5)>>6;
	lc++;sprintf(lh[lc],"     unnamed bit 6                 =  0x%x ",temp);
	checkZero(temp);
	temp=(getright&FBB)>>7;
	lc++;sprintf(lh[lc],"     Fast Back To Back             =  0x%x ",temp);
	checkOne(temp);
	temp=(getright&DPD)>>8;
	lc++;sprintf(lh[lc],"     Data Parity Detected          =  0x%x ",temp);
	printMsg(temp, msg00DPD0,msg00DPD1);
	temp=(getright&DEV)>>9;
	lc++;sprintf(lh[lc],"     DEVSEL Use fast device Timing =  0x%x ",temp);
	checkZero(temp);
	temp=(getright&ST)>>11;
	lc++;sprintf(lh[lc],"     Signaled Target-abort         =  0x%x ",temp);
	printMsg(temp, msg00ST0,msg00ST1);
	temp=(getright&RT)>>12;
	lc++;sprintf(lh[lc],"     Received Target-abort         =  0x%x ",temp);
	printMsg(temp, msg00RT0,msg00RT1);
	temp=(getright&RMA)>>13;
	lc++;sprintf(lh[lc],"     Received Master-abort         =  0x%x ",temp);
	printMsg(temp, msg00RMA0,msg00RMA1);
	temp=(getright&SSE)>>14;
	lc++;sprintf(lh[lc],"     Signaled System abort         =  0x%x ",temp);
	printMsg(temp, msg00SSE0,msg00SSE1);
	temp=(getright&DPE)>>15;
	lc++;sprintf(lh[lc],"     Detected Parity Error         =  0x%x ",temp);
	printMsg(temp, msg00DPE0,msg00DPE1);
	printOrder();
return 0;
}

int Reg08(int value)
{
int CC=0xff000000, SBC=0x00ff0000, SPI=0x0000ff00, REV=0x000000ff;
int temp;
	printf("\nReg08  Class Code, Subclass Code, Standard Programming, Revision ID = 0x%08x\n",value);
	temp=(value&REV);
	lc++;sprintf(lh[lc],"  0x08:Revision ID                        = 0x%02X\n",temp);
	temp=(value&SPI)>>8;
	lc++;sprintf(lh[lc],"  0x09:Standard Programing Interface      = 0x%02X ",temp);
	printMsgChoice(PCR, temp, 0,msg08SPI0,1,msg08SPI1);
	temp=(value&SBC)>>16;
	lc++;sprintf(lh[lc],"  0x0a:Subclass Code                      = 0x%02X\n",temp);
	temp=(((value&CC)>>24) & REV); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x0b:Base Class Code                    = 0x%02X ",temp);
	printMsgChoice(PCR, temp, 6, msg08SBC6, 0x0e, msg08SBCe);
	printOrder();
return 0;
}


int Reg0c(int value)
{
int BIST=0xff000000, HDR=0x00ff0000, LTT=0x0000ff00, CLS=0x000000ff;
int temp;
	printf("\nReg0c  BIST Control, Header Type, Latency Timer, Cache Line Size = 0x%08x\n",value);
	temp=(value&CLS);
	lc++;sprintf(lh[lc],"  0x0C:Cache Line Size                   = 0x%02X ",temp);
	sprintf(lh[lc]+strlen(lh[lc])," Only valid values are 0 or 8\n");
	temp=(value&LTT)>>8;
	lc++;sprintf(lh[lc],"  0x0D:Latency Timer                     = 0x%02X\n",temp);
	temp=(value&HDR)>>16;
	lc++;sprintf(lh[lc],"  0x0E:Header Type                       = 0x%02X\n",temp);
	temp=(((value&BIST)>>24) & CLS); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x0F:BIST Control                      = 0x%02X\n",temp);
	printOrder();
return 0;
}

int Reg10(int value)
{
int IMBA=0xffff0000, Z1=0x0000ff0, PF=0x00000008, TYPE=0x00000003, MSI=00000001;
int temp;
	printf("\nReg10  LMBAR Local Memory Base Register = 0x%08x\n",value);
	temp=(value&MSI);
	lc++;sprintf(lh[lc],"  Memory Space Indicator       = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&TYPE)>>1;
	lc++;sprintf(lh[lc],"  Type                         = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PF)>>3;
	lc++;sprintf(lh[lc],"  Prefetchable                 = 0x%01X ",temp);
	printMsg(temp, msg10PF0,msg10PF1);
	temp=(value&Z1)>>4;
	lc++;sprintf(lh[lc],"  unnamed bits 11 - 4          = 0x%02X ",temp);
	checkZero(temp);
	temp=(((value&IMBA)>>16) & ~IMBA); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Inbound Memory Base Address  = 0x%04X\n",temp);
	printOrder();
return 0;
}

int Reg14(int value)
{
int BASE=0xfffff000, Z1=0x0000fff, STRIP=0x000fffff;
int temp;
	printf("\nReg14  PCSR Peripheral Control and Status Register Base Address = 0x%08x\n",value);
	temp=(((value&BASE)>>12) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  PCI Base Address             = 0x%05X\n",temp);
	temp=(value&Z1);
	lc++;sprintf(lh[lc],"  unnamed bits 11 - 0          = 0x%02X ",temp);
	checkZero(temp);
	printOrder();
return 0;
}

int Reg3c(int value)
{
int ML=0xff000000, MG=0x00ff0000, IP=0x0000ff00, IL=0x000000ff;
int temp;
	printf("\nReg3c  Max Lat, Min GNT, Interrupt Pin, Interrupt Line = 0x%08x\n",value);
	temp=(value&IL);
	lc++;sprintf(lh[lc],"  0x3C:Interrupt Line               = 0x%02X\n",temp);
	temp=(value&IP)>>8;
	lc++;sprintf(lh[lc],"  0x3D:Interrupt Pin                = 0x%02X\n",temp);
	temp=(value&MG)>>16;
	lc++;sprintf(lh[lc],"  0x3E:MIN GNT                      = 0x%02X\n",temp);
	temp=(((value&ML)>>24) & IL); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x0F:MAX LAT                      = 0x%02X\n",temp);
	printOrder();
return 0;
}

int Reg40(int value, int part)
{
int Z1=0xffff0000, SB=0x0000ff00, BN=0x000000ff;
int Z2=0xff000000, DC=0x00ff0000;
int temp;
      if((part == PART_MPC8240H) || (part == PART_MPC8240A))
      {
	printf("\nReg40  This register is reserved on MPC8240 = 0x%08x\n",
                         value);
	printf("  The values shown below correspond to the MPC107\n");
	part = PART_MPC107;
      }
      else
      {
	printf("\nReg40  Subrodinate Bus # and Bus Number = 0x%08x\n",value);
      }

	temp=(value&BN);
	lc++;sprintf(lh[lc],"  0x40:Bus Number               = 0x%02X\n",temp);
	temp=(value&SB)>>8;
	lc++;sprintf(lh[lc],"  0x41:Subordinate Bus #        = 0x%02X\n",temp);
      switch(part)
      {
       case PART_MPC106:
	temp=(value&DC)>>16;
	lc++;sprintf(lh[lc],"  0x42:Disconnect Counter       = 0x%02X\n",temp);
	temp=(((value&Z2)>>24) & BN); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x43:unnammed bits 31 - 24    = 0x%02X ",temp);
	checkZero(temp);
	break;

       case PART_MPC107:
	temp=(((value&Z1)>>16) & ~Z1); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x42:unnammed bits 31 - 17    = 0x%04X ",temp);
	checkZero(temp);
	break;

      }
	printOrder();
return 0;
}

int Reg44(int value, int part)
{
int AC=0xffff0000, Z1=0x0000ffff;
int DPL=0x0000001f, Z2=0x00000060, PL=0x00000080, Z3=0x00000300, RT=0x00000400,
    Z4=0x00000800, PM=0x00006000, EA=0x00008000;
int temp;
      if(part == PART_MPC8240H) part = PART_MPC107; /* same definition */
      if(part == PART_MPC8240A) part = PART_MPC107; /* same definition */
      switch(part)
      {
       case PART_MPC106:
	printf("\nReg44  Special cycle Address     = 0x%08x\n",value);
	temp=(value&Z1);
	lc++;sprintf(lh[lc],"  0x44:Special cycle Address    = 0x%04X\n",temp);
	temp=(((value&AC)>>16) & ~AC); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x46:unnammed bits 31 - 16    = 0x%04X ",temp);
	checkZero(temp);
	break;

       case PART_MPC107:
	printf("\nReg44  PCI Arbiter Control = 0x%08x\n",value);
	temp=(value&Z1);
	lc++;sprintf(lh[lc],"  0x44:unnammed bits 16 - 0    = 0x%04X ",temp);
	checkZero(temp);
	temp=(((value&AC)>>16) & ~AC); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x46:PCI Arbiter Control     = 0x%04X\n",temp);
	temp=value&DPL; 
	lc++;sprintf(lh[lc],"     External Device Priority levels   = 0x%01x\n",temp);
	temp=(value&Z2)>>5;
	lc++;sprintf(lh[lc],"     unnammed bits 6 - 5               = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PL)>>7; 
	lc++;sprintf(lh[lc],"     MPC107 Priority Level             = 0x%01x ",temp);
	printMsgChoice(PCR, temp, 0, msg44PL0, 1,msg44PL1);
	temp=(value&Z3)>>8;
	lc++;sprintf(lh[lc],"     unnammed bits 9 - 8               = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&RT)>>10; 
	lc++;sprintf(lh[lc],"     Retry PCI Configuration Cycle     = 0x%01x ",temp);
	printMsg(temp, msg44RT0, msg44RT1);
	temp=(value&Z4)>>11;
	lc++;sprintf(lh[lc],"     unnammed bits 12 - 11             = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PM)>>13; 
	lc++;sprintf(lh[lc],"     Parking Mode Bus parked with      = 0x%01x ",temp);
	printMsgChoice(NO_PCR, temp, 0, msg44PM0, 1, msg44PM1);
	printMsgChoice(PCR, temp, 2, msg44PM2, 3, msga8CMM1);
	temp=(value&EA)>>15; 
	lc++;sprintf(lh[lc],"     Enable Internal PCI arbitration   = 0x%01x ",temp);
	printMsgChoice(PCR, temp, 0, msg44EA0, 1, msg44EA1);
	break;

      }
	printOrder();
return 0;
}

int Reg70(int value, int part)
{
int ODC=0xff000000, PM2=0x00ff0000, PM1=0x0000ffff, STRIP=0x000000ff;
int Z1=0x00000001, CKM=0x00000006, SLP=0x00000008, NAP=0x0000001,
    DOZE=0x00000020, BR1=0x00000040, PM=0x00000080, Z2=0x00000300,
    SQ=0x00000400, Z3=0x00000800, LP=0x00001000, Z4=0x00002000,
    NS=0x00004000, NN=0x00008000;
int Z5=0x00010000, PSS=0x00020000, PSL=0x00040000, Z6=0x00080000, 
    PHD=0x00700000, DE=0x00800000;
int temp;
      switch(part)
      {
       case PART_MPC8240H:
       case PART_MPC8240A:
	Reg70_MPC8240(value);
	break;

       case PART_MPC106:
	Reg70_MPC106(value);
	break;

       case PART_MPC107:
	printf("\nReg70  Power Management & Output Driver = 0x%08x\n",value);
	temp=(value&PM1);
	lc++;sprintf(lh[lc],"  0x70:Power Management Register 1 = 0x%04X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0x70 */
	temp=value&Z1;
	lc++;sprintf(lh[lc],"     unnammed bit  0                   = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&CKM)>>1;
	lc++;sprintf(lh[lc],"     Selects Clock Source              = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msg70CKM0,1,msg70CKM1);
	printMsgChoice(PCR,temp,2,msg70CKM2,3,msg70CKM3);
	temp=(value&SLP)>>3;
	lc++;sprintf(lh[lc],"     Sleep  Mode                       = 0x%01X ",temp);
	printMsg(temp,msg70SP0,msg70SP1);
	temp=(value&NAP)>>4;
	lc++;sprintf(lh[lc],"     Nap  Mode                         = 0x%01X ",temp);
	printMsg(temp,msg70NP0,msg70NP0);
	temp=(value&DOZE)>>5;
	lc++;sprintf(lh[lc],"     Doze Mode                         = 0x%01X ",temp);
	printMsg(temp,msg70DZ0,msg70DZ1);
	temp=(value&BR1)>>6;
	lc++;sprintf(lh[lc],"     BR1* Wake                         = 0x%01X ",temp);
	printMsg(temp,msg70BR0,msg70BR1);
	temp=(value&PM)>>7;
	lc++;sprintf(lh[lc],"     Power Management Enable           = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&Z2)>>8;
	lc++;sprintf(lh[lc],"     unnammed bits 9 - 8               = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&SQ)>>10;
	lc++;sprintf(lh[lc],"     Suspend Mode QACK*                = 0x%01X ",temp);
	printMsg(temp,msg70SQ0,msg70SQ1);
	temp=(value&Z3)>>11;
	lc++;sprintf(lh[lc],"     unnammed bits 11                  = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&LP)>>12;
	lc++;sprintf(lh[lc],"     Low Power Refresh                 = 0x%01X ",temp);
	printMsg(temp,msg70LP0,msg70LP1);
	temp=(value&Z4)>>13;
	lc++;sprintf(lh[lc],"     unnammed bit  13                  = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&NS)>>14;
	lc++;sprintf(lh[lc],"     No Sleep Message Broadcast        = 0x%01X ",temp);
	sprintf(lh[lc]+strlen(lh[lc])," Not supported Must be 1\n");
	temp=(value&NN)>>15;
	lc++;sprintf(lh[lc],"     No Nap Msg Halt command Broadcast = 0x%01X ",temp);
	sprintf(lh[lc]+strlen(lh[lc])," Not supported Must be 1\n");

	temp=(value&PM2)>>16;
	lc++;sprintf(lh[lc],"  0x72:Power Management Register 2 = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0x72 */
	temp=(value&Z5)>>16;
	lc++;sprintf(lh[lc],"     unnammed bit  0                   = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PSS)>>17;
	lc++;sprintf(lh[lc],"     Sampling When Waking from Sleep   = 0x%01X ",temp);
	printMsg(temp,msg70PSS0,msg70PSS1);
	temp=(value&PSL)>>18;
	lc++;sprintf(lh[lc],"     Sampling When Waking from Suspend = 0x%01X ",temp);
	printMsg(temp,msg70PSS0,msg70PSS1);
	temp=(value&Z6)>>19;
	lc++;sprintf(lh[lc],"     unnammed bit  3                   = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PHD)>>20;
	lc++;sprintf(lh[lc],"     PCI Hold Delay                    = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msg70PHD0,1,msg70PHD1);
	printMsgChoice(PCR,temp,4,msg70PHD4,6,msg70PHD6);
	temp=(value&DE)>>23;
	lc++;sprintf(lh[lc],"     DLL Extend                        = 0x%01X ",temp);
	printMsg(temp,msg70DE0,msg70DE1);

	Reg70_ODCR(value);
	break;

      }

	printOrder();
return 0;
}

int Reg74(int value, int part)
{
int Z1=0xff000000, MDCR=0x00ff0000, CDCR=0x0000ffff, STRIP=0x000000ff;
int C2=0x00000001, C1=0x00000002, C0=0x00000004,
    S3=0x00000008, S2=0x00000010, S1=0x00000020, S0=0x00000040,
    SOUT=0x00000080, DC=0x00000300, 
    P4=0x00000400, P3=0x00000800, P2=0x00001000, P1=0x00002000,
    P0=0x00004000, POS=0x00008000;
int   Z2=0x001f0000, HIZ=0x00200000, SRES=0x00400000, MCP=0x00800000;
int temp;
	printf("\nReg74  Power Management & Output Driver = 0x%08x\n",value);
	temp=(value&CDCR);
	lc++;sprintf(lh[lc],"  0x74:Clock Driver Control Register = 0x%04X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0x74 */ 
      if( (part == PART_MPC8240H) || (part == PART_MPC8240A) )
      {
	temp=value&C2;
	lc++;sprintf(lh[lc],"8240 Reserved:   CPU_CLK2_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&C1)>>1;
	lc++;sprintf(lh[lc],"8240 Reserved:   CPU_CLK1_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&C0)>>2;
	lc++;sprintf(lh[lc],"8240 Reserved:   CPU_CLK0_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      }
      else
      {
	temp=value&C2;
	lc++;sprintf(lh[lc],"     CPU_CLK2_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&C1)>>1;
	lc++;sprintf(lh[lc],"     CPU_CLK1_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&C0)>>2;
	lc++;sprintf(lh[lc],"     CPU_CLK0_DIS output               = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      }
	temp=(value&S3)>>3;
	lc++;sprintf(lh[lc],"     SDRAM_CLK3_DIS output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&S2)>>4;
	lc++;sprintf(lh[lc],"     SDRAM_CLK2_DIS output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&S1)>>5;
	lc++;sprintf(lh[lc],"     SDRAM_CLK1_DIS output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&S0)>>6;
	lc++;sprintf(lh[lc],"     SDRAM_CLK0_DIS output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      if( (part == PART_MPC8240H) || (part == PART_MPC8240A) )
      {
	temp=(value&SOUT)>>7;
	lc++;sprintf(lh[lc],"8240 Reserved:   SDRAM_SYNC_OUT output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&DC)>>8;
	lc++;sprintf(lh[lc],"8240 Reserved:   Driver capability for CPU_CLK      = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msg70DMC0,1,msg70DMC1);
	printMsgChoice(PCR,temp,2,msg70DMC2,3,msg70DMC3);
      }
      else
      {
	temp=(value&SOUT)>>7;
	lc++;sprintf(lh[lc],"     SDRAM_SYNC_OUT output              = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&DC)>>8;
	lc++;sprintf(lh[lc],"     Driver capability for CPU_CLK      = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msg70DMC0,1,msg70DMC1);
	printMsgChoice(PCR,temp,2,msg70DMC2,3,msg70DMC3);
      }
	temp=(value&P4)>>10;
	lc++;sprintf(lh[lc],"     PCI_CL4_DIS output                 = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&P3)>>11;
	lc++;sprintf(lh[lc],"     PCI_CL3_DIS output                 = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&P2)>>12;
	lc++;sprintf(lh[lc],"     PCI_CL2_DIS output                 = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&P1)>>13;
	lc++;sprintf(lh[lc],"     PCI_CL1_DIS output                 = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
	temp=(value&P0)>>14;
	lc++;sprintf(lh[lc],"     PCI_CL0_DIS output                 = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      if( (part == PART_MPC8240H) || (part == PART_MPC8240A) )
      {
	temp=(value&POS)>>15;
	lc++;sprintf(lh[lc],"8240 Reserved:   PCI_SYNC_OUT output                = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      }
      else
      {
	temp=(value&POS)>>15;
	lc++;sprintf(lh[lc],"     PCI_SYNC_OUT output                = 0x%01X ",temp);
	printMsg(temp,msg74CK0,msg74CK1);
      }

      if((part == PART_MPC8240H) || (part == PART_MPC8240A))
        {
	temp=(value&MDCR)>>16;
	lc++;sprintf(lh[lc],"8240 Reserved:0x76:Misc. Driver Control Register = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0x76 */ 
	temp=(value&Z2)>>16;
	lc++;sprintf(lh[lc],"8240 Reserved:   unnamed bits 4 - 0                 = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&HIZ)>>21;
	lc++;sprintf(lh[lc],"8240 Reserved:   HI-Z_Qack                          = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74HZ1);
	temp=(value&SRES)>>22;
	lc++;sprintf(lh[lc],"8240 Reserved:   SRESET_OD_MODE                     = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74OD1);
	temp=(value&MCP)>>23;
	lc++;sprintf(lh[lc],"8240 Reserved:   MCP_OD_MODE                        = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74OD1);

	temp=(((value&Z1)>>24) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"8240 Reserved:0x77:unnamed bits 25 - 31          = 0x%02X ",temp);
	li++;lhIndex[li]=lc; /* index for 0x77 */ 
	checkZero(temp);
	}
	else
	{
	temp=(value&MDCR)>>16;
	lc++;sprintf(lh[lc],"  0x76:Misc. Driver Control Register = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0x76 */ 
	temp=(value&Z2)>>16;
	lc++;sprintf(lh[lc],"     unnamed bits 4 - 0                 = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&HIZ)>>21;
	lc++;sprintf(lh[lc],"     HI-Z_Qack                          = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74HZ1);
	temp=(value&SRES)>>22;
	lc++;sprintf(lh[lc],"     SRESET_OD_MODE                     = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74OD1);
	temp=(value&MCP)>>23;
	lc++;sprintf(lh[lc],"     MCP_OD_MODE                        = 0x%01X ",temp);
	printMsg(temp,msg74HZ0,msg74OD1);

	temp=(((value&Z1)>>24) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0x77:unnamed bits 25 - 31          = 0x%02X ",temp);
	li++;lhIndex[li]=lc; /* index for 0x76 */ 
	checkZero(temp);
	}

	printOrder();
return 0;
}

int Reg78(int value)
{
int Z1=0x000fffff, BASE=0xfff00000, STRIP=0x00000fff;
int temp;
	printf("\nReg78  EUMBAR Embedded Util Mem Base A Reg = 0x%08x\n",value);
	temp=(value&Z1);
	lc++;sprintf(lh[lc],"  unnamed bits 19 - 20          = 0x%04X ",temp);
	checkZero(temp);
	temp=(((value&BASE)>>20) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Base Address                  = 0x%03X\n",temp);

	printOrder();
return 0;
}

int Reg80(int value)
{
int B3=0xff000000, B2=0x00ff0000, B1=0x0000ff00, B0=0x000000ff;
int temp;
	printf("\nReg80  Memory Starting Address Register 1  = 0x%08x\n",value);
	temp=(value&B0);
	lc++;sprintf(lh[lc],"  Starting Address Bank 0       = 0x%02X\n",temp);
	temp=(value&B1)>>8;
	lc++;sprintf(lh[lc],"  Starting Address Bank 1       = 0x%02X\n",temp);
	temp=(value&B2)>>16;
	lc++;sprintf(lh[lc],"  Starting Address Bank 2       = 0x%02X\n",temp);
	temp=(((value&B3)>>24) & B0); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Starting Address Bank 3       = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Reg84(int value)
{
int B7=0xff000000, B6=0x00ff0000, B5=0x0000ff00, B4=0x000000ff;
int temp;
	printf("\nReg84  Memory Starting Address Register 2  = 0x%08x\n",value);
	temp=(value&B4);
	lc++;sprintf(lh[lc],"  Starting Address Bank 4       = 0x%02X\n",temp);
	temp=(value&B5)>>8;
	lc++;sprintf(lh[lc],"  Starting Address Bank 5       = 0x%02X\n",temp);
	temp=(value&B6)>>16;
	lc++;sprintf(lh[lc],"  Starting Address Bank 6       = 0x%02X\n",temp);
	temp=(((value&B7)>>24) & B4); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Starting Address Bank 7       = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Reg88(int value)
{
int Z3=0xfc000000, E3=0x03000000, Z2=0x00fc0000, E2=0x00030000,
    Z1=0x0000fc00, E1=0x00000300, Z0=0x000000fc, E0=0x00000003;
int temp;
	printf("\nReg88  Extended Memory Ending Address 1   = 0x%08x\n",value);
	temp=(value&E0);
	lc++;sprintf(lh[lc],"  Extended Starting Address 3   = 0x%01X\n",temp);
	temp=(value&Z0)>>2;
	lc++;sprintf(lh[lc],"  unnammed bits 7 - 2           = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E1)>>8;
	lc++;sprintf(lh[lc],"  Extended Starting Address 2   = 0x%01X\n",temp);
	temp=(value&Z1)>>10;
	lc++;sprintf(lh[lc],"  unnammed bits 15 - 10         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E2)>>16;
	lc++;sprintf(lh[lc],"  Extended Starting Address 1   = 0x%01X\n",temp);
	temp=(value&Z2)>>18;
	lc++;sprintf(lh[lc],"  unnammed bits 23 - 18         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E3)>>24;
	lc++;sprintf(lh[lc],"  Extended Starting Address 0   = 0x%01X\n",temp);
	temp=((((value&Z3)>>24) & Z0)>>2); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnammed bits 31 - 26         = 0x%02X ",temp);
	checkZero(temp);

	printOrder();
return 0;
}

int Reg8c(int value)
{
int Z7=0xfc000000, E7=0x03000000, Z6=0x00fc0000, E6=0x00030000,
    Z5=0x0000fc00, E5=0x00000300, Z4=0x000000fc, E4=0x00000003;
int temp;
	printf("\nReg8c  Extended Memory Ending Address 2   = 0x%08x\n",value);
	temp=(value&E4);
	lc++;sprintf(lh[lc],"  Extended Starting Address 7   = 0x%01X\n",temp);
	temp=(value&Z4)>>2;
	lc++;sprintf(lh[lc],"  unnammed bits 7 - 2           = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E5)>>8;
	lc++;sprintf(lh[lc],"  Extended Starting Address 6   = 0x%01X\n",temp);
	temp=(value&Z5)>>10;
	lc++;sprintf(lh[lc],"  unnammed bits 15 - 10         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E6)>>16;
	lc++;sprintf(lh[lc],"  Extended Starting Address 5   = 0x%01X\n",temp);
	temp=(value&Z6)>>18;
	lc++;sprintf(lh[lc],"  unnammed bits 23 - 18         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E7)>>24;
	lc++;sprintf(lh[lc],"  Extended Starting Address 4   = 0x%01X\n",temp);
	temp=((((value&Z7)>>24) & Z4)>>2); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnammed bits 31 - 26         = 0x%02X ",temp);
	checkZero(temp);

	printOrder();
return 0;
}

int Reg90(int value)
{
int B3=0xff000000, B2=0x00ff0000, B1=0x0000ff00, B0=0x000000ff;
int temp;
	printf("\nReg90  Memory Ending Address Register 1  = 0x%08x\n",value);
	temp=(value&B0);
	lc++;sprintf(lh[lc],"  Ending Address Bank 0         = 0x%02X\n",temp);
	temp=(value&B1)>>8;
	lc++;sprintf(lh[lc],"  Ending Address Bank 1         = 0x%02X\n",temp);
	temp=(value&B2)>>16;
	lc++;sprintf(lh[lc],"  Ending Address Bank 2         = 0x%02X\n",temp);
	temp=(((value&B3)>>24) & B0); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Ending Address Bank 3         = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Reg94(int value)
{
int B7=0xff000000, B6=0x00ff0000, B5=0x0000ff00, B4=0x000000ff;
int temp;
	printf("\nReg94  Memory Ending Address Register 2  = 0x%08x\n",value);
	temp=(value&B4);
	lc++;sprintf(lh[lc],"  Ending Address Bank 4         = 0x%02X\n",temp);
	temp=(value&B5)>>8;
	lc++;sprintf(lh[lc],"  Ending Address Bank 5         = 0x%02X\n",temp);
	temp=(value&B6)>>16;
	lc++;sprintf(lh[lc],"  Ending Address Bank 6         = 0x%02X\n",temp);
	temp=(((value&B7)>>24) & B4); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Ending Address Bank 7         = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Reg98(int value)
{
int Z3=0xfc000000, E3=0x03000000, Z2=0x00fc0000, E2=0x00030000,
    Z1=0x0000fc00, E1=0x00000300, Z0=0x000000fc, E0=0x00000003;
int temp;
	printf("\nReg98  Extended Memory Ending Address 1   = 0x%08x\n",value);
	temp=(value&E0);
	lc++;sprintf(lh[lc],"  Extended Ending Address 3   = 0x%01X\n",temp);
	temp=(value&Z0)>>2;
	lc++;sprintf(lh[lc],"  unnammed bits 7 - 2           = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E1)>>8;
	lc++;sprintf(lh[lc],"  Extended Ending Address 2   = 0x%01X\n",temp);
	temp=(value&Z1)>>10;
	lc++;sprintf(lh[lc],"  unnammed bits 15 - 10         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E2)>>16;
	lc++;sprintf(lh[lc],"  Extended Ending Address 1   = 0x%01X\n",temp);
	temp=(value&Z2)>>18;
	lc++;sprintf(lh[lc],"  unnammed bits 23 - 18         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E3)>>24;
	lc++;sprintf(lh[lc],"  Extended Ending Address 0   = 0x%01X\n",temp);
	temp=((((value&Z3)>>24) & Z0)>>2); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnammed bits 31 - 26         = 0x%02X ",temp);
	checkZero(temp);

	printOrder();
return 0;
}

int Reg9c(int value)
{
int Z7=0xfc000000, E7=0x03000000, Z6=0x00fc0000, E6=0x00030000,
    Z5=0x0000fc00, E5=0x00000300, Z4=0x000000fc, E4=0x00000003;
int temp;
	printf("\nReg9c  Extended Memory Ending Address 2   = 0x%08x\n",value);
	temp=(value&E4);
	lc++;sprintf(lh[lc],"  Extended Ending Address 7   = 0x%01X\n",temp);
	temp=(value&Z4)>>2;
	lc++;sprintf(lh[lc],"  unnammed bits 7 - 2           = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E5)>>8;
	lc++;sprintf(lh[lc],"  Extended Ending Address 6   = 0x%01X\n",temp);
	temp=(value&Z5)>>10;
	lc++;sprintf(lh[lc],"  unnammed bits 15 - 10         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E6)>>16;
	lc++;sprintf(lh[lc],"  Extended Ending Address 5   = 0x%01X\n",temp);
	temp=(value&Z6)>>18;
	lc++;sprintf(lh[lc],"  unnammed bits 23 - 18         = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&E7)>>24;
	lc++;sprintf(lh[lc],"  Extended Ending Address 4   = 0x%01X\n",temp);
	temp=((((value&Z7)>>24) & Z4)>>2); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnammed bits 31 - 26         = 0x%02X ",temp);
	checkZero(temp);

	printOrder();
return 0;
}

int Rega0(int value)
{
int MPM=0xff000000, Z1=0x00ffff00, MBE=0x000000ff, BIT=0x00000001;
int temp,i,extract;
int clocks;
	printf("\nRega0  Memory Page and Bank Information  = 0x%08x\n",value);
	temp=(value&MBE);
	lc++;sprintf(lh[lc],"  0xa0:Memory Bank Enable Register   = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xa0 */
	for(i=0;i<8;i++)
	{
	   extract = (temp & BIT)>>i;  /* get bit at location */
	   BIT =  BIT << 1;            /* next bit position   */
	   lc++;sprintf(lh[lc],"     Bank%1d       = 0x%01X ",i,extract);
	   printMsg(extract,msga0B0,msga0B1);
	}

	temp=(value&Z1)>>8;
	lc++;sprintf(lh[lc],"  0xa1:unnamed bits 23 - 8           = 0x%02X ",temp);
	li++;lhIndex[li]=lc; /* index for 0xa1 */
	checkZero(temp);

	temp=(((value&MPM)>>24) & MBE); /* strip off sign extension */
	clocks = temp * 64;  /* compute clocks */
	lc++;sprintf(lh[lc],"  0xa3:Memory Page Mode Register     = 0x%02X = %d clocks\n",
                       temp,clocks);
	li++;lhIndex[li]=lc; /* index for 0xa3 */

	printOrder();
return 0;
}

int Rega8(int value, int part)
{
int Z1=0xff000000, CF=0x00c00000,  Z2=0x00200000,  RC=0x00100000, Z3=0x00080000,
    PT=0x00060000, AM=0x00010000, CFM=0x0000c000, CFL=0x00002000, FW=0x00001000,
    MC=0x00000800, TE=0x00000400,  Z4=0x00000300,  NB=0x00000080, ST=0x00000040,
    LE=0x00000020, CFS=0x0000010, CFA=0x00000008,  SR=0x00000004, CMM=0x0000003;
int CFE=0x00000100, CFD=0x00000200;
int STRIP=0x000000ff;
int temp,part1;
      part1 = part;  /*  most mpc107 is the same but there are a few 
                      *  reserved fields  
                      */
      if(part == PART_MPC8240H) part = PART_MPC107; /* same definition */
      if(part == PART_MPC8240A) part = PART_MPC107; /* same definition */
	printf("\nRega8  PICR1 Processor Interface Config 1= 0x%08x\n",value);
      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	temp=(value&CMM);
	lc++;sprintf(lh[lc],"8240 Reserved:   CF_MP Multiprocessor configuration = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM0,1,msga8CMM1);
	printMsgChoice(PCR,temp,2,msga8CMM1,3,msga8CMM3);
      }
      else
      {
	temp=(value&CMM);
	lc++;sprintf(lh[lc],"     CF_MP Multiprocessor configuration = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM0,1,msga8CMM1);
	printMsgChoice(PCR,temp,2,msga8CMM1,3,msga8CMM3);
      }
	temp=(value&SR)>>2;
	lc++;sprintf(lh[lc],"     Speculative PCI Reads              = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&CFA)>>3;
	lc++;sprintf(lh[lc],"     CF_APARK Processor Parked on 60x   = 0x%01X ",temp);
	printMsg(temp,msga8CFA0,msga8CFA1);
      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	temp=(value&CFS)>>4;
	lc++;sprintf(lh[lc],"8240 Reserved:   CF_LOOP_SNOOP Repeat Snoops        = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }
      else
      {
	temp=(value&CFS)>>4;
	lc++;sprintf(lh[lc],"     CF_LOOP_SNOOP Repeat Snoops        = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }
	temp=(value&LE)>>5;
	lc++;sprintf(lh[lc],"     LE_MODE Little Endian MODE         = 0x%01X ",temp);
	printMsg(temp,msga8LE0,msga8LE0);
	temp=(value&ST)>>6;
	lc++;sprintf(lh[lc],"     ST_GATH_EN Store gathering         = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);

      if(part == PART_MPC107)
      {
       if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
       {
	temp=(value&NB)>>7;
	lc++;sprintf(lh[lc],"8240 Reserved:  NO_BUS_WIDTH_CHECK Flash width     = 0x%01X ",temp);
	printMsg(temp,msga8NB0,msga8NB1);
	temp=(value&Z4)>>8;
	lc++;sprintf(lh[lc],"8240 Reserved:   unnamed bits 9 - 8                 = 0x%01X ",temp);
	checkZero(temp);
       }
       else
       {
	temp=(value&NB)>>7;
	lc++;sprintf(lh[lc],"     NO_BUS_WIDTH_CHECK Flash width     = 0x%01X ",temp);
	printMsg(temp,msga8NB0,msga8NB1);
	temp=(value&Z4)>>8;
	lc++;sprintf(lh[lc],"     unnamed bits 9 - 8                 = 0x%01X ",temp);
	checkZero(temp);
       }
       if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
       {
	  temp=(value&CFD)>>9;
	  lc++;sprintf(lh[lc],"8240 Reserved:   CF_DPARK data bus park           = 0x%01X ",temp);
	  printMsg(temp,msga8CFD0,msga8CFD1);
       }
      }
      if(part == PART_MPC106)
      {
	temp=(value&NB)>>7;
	lc++;sprintf(lh[lc],"     NO_PORT_REGS Map A ext config regs = 0x%01X ",temp);
	printMsg(temp,msga8NPR0,msga8NPR1);
	temp=(value&CFE)>>8;
	lc++;sprintf(lh[lc],"     CF_EXTERNAL_L2 enable              = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&CFD)>>9;
	lc++;sprintf(lh[lc],"     CF_DPARK data bus park             = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }

      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	temp=(value&TE)>>10; 
        lc++;sprintf(lh[lc],"8240 Reserved:   TEA_EN TEA enable                  = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }
      else
      {
	temp=(value&TE)>>10; 
        lc++;sprintf(lh[lc],"     TEA_EN TEA enable                  = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }
	temp=(value&MC)>>11;
	lc++;sprintf(lh[lc],"     MPC_EN Machine Check enable        = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&FW)>>12;
	lc++;sprintf(lh[lc],"     FLASH_WR_EN Flash Write enable     = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1); 
      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
        temp=(value&CFL)>>13;
	lc++;sprintf(lh[lc],"8240 Reserved:   CF_LBA_EN	 Local Bus Slave enable = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&CFM)>>14;
	lc++;sprintf(lh[lc],"8240 Reserved:   CF_MP_ID	Multiprocessor ID       = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM0,1,msga8CMM1);
	printMsgChoice(PCR,temp,2,msga8CMM1,3,msga8CMM1);
      }
      else
      {
        temp=(value&CFL)>>13;
	lc++;sprintf(lh[lc],"     CF_LBA_EN	 Local Bus Slave enable = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&CFM)>>14;
	lc++;sprintf(lh[lc],"     CF_MP_ID	Multiprocessor ID       = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM0,1,msga8CMM1);
	printMsgChoice(PCR,temp,2,msga8CMM1,3,msga8CMM1);
      }
	temp=(value&AM)>>16;
	lc++;sprintf(lh[lc],"     ADDRESS_MAP                        = 0x%01X ",temp);
	printMsg(temp,msga8AM0,msga8AM1);
	temp=(value&PT)>>17;
	lc++;sprintf(lh[lc],"     PROC_TYPE  Processor Type          = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM1,1,msga8CMM1);
      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
	printMsgChoice(PCR,temp,2,msga8PT1,3,msga8CMM1);
      else
	printMsgChoice(PCR,temp,2,msga8PT0,3,msga8CMM1);

      if(part == PART_MPC107)
      {
	temp=(value&Z3)>>19;
	lc++;sprintf(lh[lc],"     unnamed bit  19                    = 0x%01X ",temp);
	checkZero(temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&Z3)>>19;
	lc++;sprintf(lh[lc],"     XIO_MODE Map A mode                = 0x%01X ",temp);
	printMsg(temp,msga8XIO0,msga8XIO1);
      }

	temp=(value&RC)>>20;
	lc++;sprintf(lh[lc],"     RCS0  ROM Location                 = 0x%01X ",temp);
	printMsg(temp,msga8RC0,msga8RC1);

      if(part == PART_MPC107)
      {
	temp=(value&Z2)>>21;
	lc++;sprintf(lh[lc],"     unnamed bit  21                    = 0x%01X ",temp);
	checkZero(temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&Z2)>>21;
	lc++;sprintf(lh[lc],"     CF_CACHE_1G L2 cache addresses     = 0x%01X ",temp);
	printMsg(temp,msga8CFC0,msga8CFC1);
      }

      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	temp=(value&CF)>>22;
	lc++;sprintf(lh[lc],"8240 Reserved: CF_BREAD_WS Burst Read Wait States = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CF0,1,msga8CF1);
	printMsgChoice(PCR,temp,2,msga8CF2,3,msga8CF3);
      }
      else
      {
	temp=(value&CF)>>22;
	lc++;sprintf(lh[lc],"     CF_BREAD_WS Burst Read Wait States = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CF0,1,msga8CF1);
	printMsgChoice(PCR,temp,2,msga8CF2,3,msga8CF3);
      }

      if(part == PART_MPC107)
      {
	temp=((value&Z1)>>24)&STRIP;
	lc++;sprintf(lh[lc],"     unnamed bits  31 - 24              = 0x%01X ",temp);
	checkAllOnes(8,temp);
      }
      if(part == PART_MPC106)
      {
	temp=((value&Z1)>>24)&STRIP;
	lc++;sprintf(lh[lc],"     CF_CBA_MASK L2 copy back addr mask = 0x%01X\n",temp);
      }


	printOrder();
return 0;
}

int Regac(int value, int part)
{
int Z1=0xc0000000, SC=0x20000000, Z2=0x10000000,  NS=0x08000000, CFL=0x04000000,
    FW=0x02000000, Z3=0x01f00000, CS=0x000c0000,  Z4=0x0003fc00, CFB=0x00000300,
    Z5=0x000000f0, CFA=0x0000000c,  Z6=0x00000003, STRIP=0x0000003;
int temp,part1;
      part1 = part;  /*  most mpc107 is the same but there are a few 
                      *  reserved fields  
                      */
      if(part == PART_MPC8240H) part = PART_MPC107; /* same definition */
      if(part == PART_MPC8240A) part = PART_MPC107; /* same definition */
      switch(part)
      {
       case PART_MPC106:
	Regac_MPC106(value);
	break;

       case PART_MPC107:
	printf("\nRegac  PICR2 Processor Interface Config 2= 0x%08x\n",value);
	temp=value&Z6;
	lc++;sprintf(lh[lc],"     unnamed bits  1 - 0                = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&CFA)>>2;
	lc++;sprintf(lh[lc],"     CF_APHASE_WS Address phase wait    = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msgacCFA0,1,msgacCFA1);
	printMsgChoice(PCR,temp,2,msgacCFA2,3,msgacCFA3);
	temp=value&Z5>>4;
	lc++;sprintf(lh[lc],"     unnamed bits  8 - 4                = 0x%01X ",temp);
	checkZero(temp);

      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	temp=(value&CFB)>>9;
	lc++;sprintf(lh[lc],"8240 Reserved:   CF_LBCLAIM_WS LBCLAIM wait states  = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM1,1,msgacCFB1);
	printMsgChoice(PCR,temp,2,msgacCFB2,3,msgacCFB3);
      }
      else
      {
	temp=(value&CFB)>>9;
	lc++;sprintf(lh[lc],"     CF_LBCLAIM_WS LBCLAIM wait states  = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msga8CMM1,1,msgacCFB1);
	printMsgChoice(PCR,temp,2,msgacCFB2,3,msgacCFB3);
      }

	temp=value&Z4>>11;
	lc++;sprintf(lh[lc],"     unnamed bits  17 - 11              = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&CS)>>18;
	lc++;sprintf(lh[lc],"     CF_SNOOP_WS SNOOP wait states      = 0x%01X ",temp);
	printMsgChoice(NO_PCR,temp,0,msgacCFA0,1,msgacCS1);
	printMsgChoice(PCR,temp,2,msgacCFA2,3,msgacCFA3);
	temp=value&Z3>>20;
	lc++;sprintf(lh[lc],"     unnamed bits  24 - 20              = 0x%02X ",temp);
	checkZero(temp);
	temp=(value&FW)>>25;
	lc++;sprintf(lh[lc],"     FLASH_WR_LOCKOUT                   = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&CFL)>>26;
	lc++;sprintf(lh[lc],"     CF_FF0_LOCAL ROM remap enable      = 0x%01X ",temp);
	printMsg(temp,msg70PM1,msg70PM0);
	temp=(value&NS)>>27;
	lc++;sprintf(lh[lc],"     NO_SNOOP_EN Generate  Snooping     = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=value&Z2>>28;
	lc++;sprintf(lh[lc],"     unnamed bit  28                    = 0x%01X "
                     ,temp);
	checkZero(temp);
	temp=(value&SC)>>29;

      if( (part1 == PART_MPC8240H) || (part1 == PART_MPC8240A) )
      {
	lc++;sprintf(lh[lc],"     NO_SERIAL_CFG Config writes        = 0x%01X "
                     ,temp);
      }
      else
      {
	lc++;sprintf(lh[lc],"     SERIALIZE_ON_CFG Config writes     = 0x%01X "
                     ,temp);
      }

	printMsg(temp,msgacSC0,msgacSC1);
	temp=(value&Z1>>30)&STRIP; /*strip off sign extension */
	lc++;sprintf(lh[lc],"     unnamed bits 31 - 30               = 0x%01X "
                     ,temp);
	checkZero(temp);
	break;
       }

	printOrder();
return 0;
}

int Regb8(int value, int part)
{
int Z2=0xff000000,  Z1=0x00ff0000, ECCT=0x0000ff00, ECCC=0x000000ff;
int Z3=0x00c00000, RXS=0x00400000, Z4  =0x00180000, XIOM=0x00040000,
   TEA=0x00020000, MCP=0x00010000, Z5  =0xfe000000, FWE =0x01000000,
   STRIP=0x0000007f;
int temp;
      if(part == PART_MPC8240H) part = PART_MPC107; /* same definition */
      if(part == PART_MPC8240A) part = PART_MPC107; /* same definition */
	printf("\nRegb8  ECC Single Bit Error            = 0x%08x\n",value);
	temp=(value&ECCC);
	lc++;sprintf(lh[lc],"  0xb8:ECC single bit counter   = 0x%02X\n",temp);
	temp=(value&ECCT)>>8;
	lc++;sprintf(lh[lc],"  0xB9:ECC single bit Trigger   = 0x%02X ",temp);
	printMsg(temp,msgb8T0,msgb8T1);
      if(part == PART_MPC107)
      {
	temp=(value&Z1)>>16;
	lc++;sprintf(lh[lc],"  0xba:unnamed bits 23 - 17     = 0x%02X ",temp);
	checkZero(temp);
	temp=(((value&Z2)>>24) & ECCC); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0xbb:unnamed bits 31 - 18     = 0x%02X ",temp);
	checkZero(temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&Z1)>>16;
	lc++;sprintf(lh[lc],"  0xba:Alternate OS-Visible Reg1= 0x%02X\n",temp);
	temp=(value&MCP)>>16;
	lc++;sprintf(lh[lc],"  MCP_EN Machine check enable = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&TEA)>>17;
	lc++;sprintf(lh[lc],"  TEA_EN Transfer Error Ack   = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(value&XIOM)>>18;
	lc++;sprintf(lh[lc],"  XIO_MODE Map A mode         = 0x%01X ",temp);
	printMsg(temp,msga8XIO1,msga8XIO0);
	temp=(value&Z4)>>19;
	lc++;sprintf(lh[lc],"  unnamed bits 4 - 3          = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&RXS)>>21;
	lc++;sprintf(lh[lc],"  RX_SERR_EN SEER* assertion  = 0x%01X ",temp);
	printMsg(temp,msgacAOD1,msgb8RXS1);
	temp=(value&Z3)>>22;
	lc++;sprintf(lh[lc],"  unnamed bits 7 - 6          = 0x%01X ",temp);
	checkZero(temp);
	temp=(((value&Z2)>>24) & ECCC); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0xbb:Alternate OS-Visible Reg2= 0x%02X\n",temp);
	temp=(value&FWE)>>24;
	lc++;sprintf(lh[lc],"  FLASH_WR_EN flash write     = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
	temp=(((value&Z5)>>25) & STRIP);
	lc++;sprintf(lh[lc],"  unnamed bits 7 - 1          = 0x%01X ",temp);
	checkZero(temp);
      }

	printOrder();
return 0;
}

int Regc0(int value, int part)
{
int PBES=0xff000000, Z1=0x00ff0000, ED1=0x0000ff00, EE1=0x000000ff;
int   UPT=0x00000300, MRP=0x0000400, PPC=0x00000800, MRO=0x00001000,
      MSE=0x00002000, PTP=0x0004000, PCI=0x00008000;
int  TT=0xf8000000, TS=0x03000000, STRIP=0x0000001f;
int temp,i,extract,BIT=0x00000001;
char *title_107[8]={"Processor Transaction  ",
                "PCI master abort       ",
                "Memory parity/ECC      ",
                "PCI master PERR*       ",
                "Memory refresh overflow",
                "Memory select          ",
                "PCI target PERR*       ",
	        "RX_SERR_EN             "};
char *title_106[8]={"60x Bus Error enable   ",
                "PCI master abort       ",
                "Memory parity/ECC      ",
                "PCI master PERR*       ",
                "Memory refresh overflow",
                "Memory select          ",
                "PCI target PERR*       ",
	        "PCI received error     "};
	printf("\nRegc0  Error Enabling and detection  1    = 0x%08x\n",value);
	temp=(value&EE1);
	lc++;sprintf(lh[lc],"  0xc0:Error Enabling 1         = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc0 */ 
	for(i=0;i<8;i++)
	{
	   extract = (temp & BIT)>>i;  /* get bit at location */
	   BIT =  BIT << 1;            /* next bit position   */

	  if(part == PART_MPC106)
	  {
	   lc++;sprintf(lh[lc],"     %s            = 0x%01X ",title_106[i]
                        ,extract);
	  }
	  else
	  {
	   lc++;sprintf(lh[lc],"     %s            = 0x%01X ",title_107[i]
                        ,extract);
	  }

	   printMsg(extract,msga0B0,msga0B1);
	}

	temp=(value&ED1)>>8;
	lc++;sprintf(lh[lc],"  0xc1:Error Detection 1        = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc1 */ 
	temp=(value&UPT)>>8;
      if(part == PART_MPC106)
      {
	lc++;sprintf(lh[lc],"     Unsupported 60x Transaction       = 0x%02X ",temp);
	printMsgChoice(NO_PCR,temp,0,msgc0MRP0,1,msgc0UPT1);
	printMsgChoice(PCR,temp,2,msgc0UPT2,3,msga8CMM1);
      }
      else
      {
	lc++;sprintf(lh[lc],"     Unsupported Processor Transaction  = 0x%02X ",temp);
	printMsgChoice(NO_PCR,temp,0,msgc0MRP0,1,msgc0UPT1);
	printMsgChoice(PCR,temp,2,msga8CMM1,3,msga8CMM1);
      }

	temp=(value&MRP)>>10;
	lc++;sprintf(lh[lc],"     Memory Read Parity ECC trigger     = 0x%01X "
                     ,temp);
	printMsg(temp,msgc0MRP0,msgc0MRP1);
	temp=(value&PPC)>>11;
      if(part == PART_MPC106)
      {
	lc++;sprintf(lh[lc],"     60x/PCI cycle error occurred       = 0x%01X "
                     ,temp);
      }
      else  /*  MPC107 or MPC8240 */
      {
	lc++;sprintf(lh[lc],"     Processor/PCI cycle error occurred = 0x%01X "
                     ,temp);
      }
	printMsg(temp,msgc0PPC0,msgc0PPC1);
	temp=(value&MRO)>>12;
	lc++;sprintf(lh[lc],"     Memory refresh overflow error      = 0x%01X "
                     ,temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&MSE)>>13;
	lc++;sprintf(lh[lc],"     Memory Select Error                = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&PTP)>>14;
	lc++;sprintf(lh[lc],"     PCI target PERR* parity error      = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&PCI)>>15;
	lc++;sprintf(lh[lc],"     PCI SERR* two clks after address   = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);

	temp=(value&Z1)>>16;
	lc++;sprintf(lh[lc],"  0xc2:unnamed bits 23 - 17     = 0x%02X ",temp);
	li++;lhIndex[li]=lc; /* index for 0xc2 */ 
	checkZero(temp);

	temp=(((value&PBES)>>24) & EE1); /* strip off sign extension */
      if(part == PART_MPC107)
      {
	lc++;sprintf(lh[lc],"  0xc3:Proc. Bus Error Status   = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc3 */ 
      }
      else  /* MPC106, MPC8240 HOST and AGENT */
      {
	lc++;sprintf(lh[lc],"  0xc3:60x   Bus Error Status   = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc3 */ 
      }
	temp=((value&TS)>>24);
	lc++;sprintf(lh[lc],"     Copy TSIZ on processor bus error   = 0x%01X\n",temp);
	temp=(((value&TT)>>27) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"     Copy of TT on processor bus error  = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Regc4(int value, int part)
{
int PBES=0xff000000, Z1=0x00ff0000, ED2=0x0000ff00, EE2=0x000000ff;
int   FRW=0x00000100, Z2 =0x0000200, PMW=0x00000400, EME=0x00000800,
      Z3 =0x00003000, PSE=0x0004000, IEA=0x00008000,
      L2PE=0x00001000, L2CB=0x0002000;
int  CBE=0x0f000000, MPC=0x10000000, Z4 =0xe0000000, STRIP=0x00000007;
int temp,i,extract,BIT=0x00000001;
char *title_107[8]={"Flash ROM Write Enable ",
                "PCI Received target    ",
                "Processor memory parity",
                "ECC multi-bit error    ",
                "Unnamed bit 4          ",
                "Unnamed bit 5          ",
                "PCI SERR               ",
                "PCI address parity     "};
char *title_106[8]={"Flash ROM Write Enable ",
                "Unnamed bit 1          ",
                "Unnamed bit 2          ",
                "ECC multi-bit error    ",
                "L2 parity error        ",
                "Illegal L2 copy back er",
                "Unnamed bit 6          ",
                "PCI address parity     "};
	printf("\nRegc4  Error Enabling and detection 2      = 0x%08x\n",value);
	temp=(value&EE2);
	lc++;sprintf(lh[lc],"  0xc4:Error Enabling 2         = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc4 */ 
    if(part == PART_MPC106)
    {
	for(i=0;i<8;i++)
	{
	   extract = (temp & BIT)>>i;  /* get bit at location */
	   BIT =  BIT << 1;            /* next bit position   */
	   lc++;sprintf(lh[lc],"     %s            = 0x%01X ",title_106[i],extract);
	   if((i==6) || (i==2) || (i==1) )
	   {
		checkZero(extract);
	   }
	   else
	   {
	   	printMsg(extract,msga0B0,msga0B1);
	   }
	}
    }  /*  end MPC106 */
    else  /*  MPC107 or MPC8240 */
    {
	for(i=0;i<8;i++)
	{
	   extract = (temp & BIT)>>i;  /* get bit at location */
	   BIT =  BIT << 1;            /* next bit position   */
	   if((i==6) && ( (part == PART_MPC8240H) || (part == PART_MPC8240A) ) )
	   {
	     lc++;sprintf(lh[lc],"8240 Reserved:   %s            = 0x%01X ",title_107[i],extract);
	   }
	   else
           {
	     lc++;sprintf(lh[lc],"     %s            = 0x%01X ",title_107[i],extract);
           }
	   if((i==4) || (i==5))
	   {
		checkZero(extract);
	   }
	   else
	   {
	   	printMsg(extract,msga0B0,msga0B1);
	   }
	}  
      }  /*  end else MPC107 or MPC8240 */

	temp=(value&ED2)>>8;
	lc++;sprintf(lh[lc],"  0xc5:Error Detection 2        = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc5 */ 

    if(part == PART_MPC106)
    {
	temp=(value&FRW)>>8;
	lc++;sprintf(lh[lc],"     Flash ROM write Error              = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&Z2)>>9;
	lc++;sprintf(lh[lc],"     Unnamed bit 1                      = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PMW)>>10;
	lc++;sprintf(lh[lc],"     Unnamed bit 2                      = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&EME)>>11;
	lc++;sprintf(lh[lc],"     ECC mutli-bit error                = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&L2PE)>>12;
	lc++;sprintf(lh[lc],"     L2 Parity Error                    = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&L2CB)>>13;
	lc++;sprintf(lh[lc],"     L2 Copy Back Error                 = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&PSE)>>14;
	lc++;sprintf(lh[lc],"     Unnamed bit 6                      = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&IEA)>>15;
	lc++;sprintf(lh[lc],"     Invalid error address Register val = 0x%01X ",temp);
	printMsg(temp,msgc4IEA0,msgc4IEA1);
    }  /* end mpc106 */
    else
    {
	temp=(value&FRW)>>8;
	lc++;sprintf(lh[lc],"     Flash ROM write Error              = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&Z2)>>9;
	lc++;sprintf(lh[lc],"     Unnamed bit 1                      = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&PMW)>>10;
	lc++;sprintf(lh[lc],"     Processor/memory write parity      = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&EME)>>11;
	lc++;sprintf(lh[lc],"     ECC mutli-bit error                = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
	temp=(value&Z3)>>12;
	lc++;sprintf(lh[lc],"     Unnamed bits 5 - 4                 = 0x%01X ",temp);
	checkZero(temp);

      if( (part == PART_MPC8240H) || (part == PART_MPC8240A) )
      {
	temp=(value&PSE)>>14;
	lc++;sprintf(lh[lc],"8240 Reserved:   PCI  SERR error                    = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
      }
      else
      {
	temp=(value&PSE)>>14;
	lc++;sprintf(lh[lc],"     PCI  SERR error                    = 0x%01X ",temp);
	printMsg(temp,msgc0MRP0,msgc0MRO1);
      }

	temp=(value&IEA)>>15;
	lc++;sprintf(lh[lc],"     Invalid error address Register val = 0x%01X ",temp);
	printMsg(temp,msgc4IEA0,msgc4IEA1);
    }  /* end else mpc107 or mpc8240 */

	temp=(value&Z1)>>16;
	lc++;sprintf(lh[lc],"  0xc6:unnamed bits 23 - 17     = 0x%02X ",temp);
	li++;lhIndex[li]=lc; /* index for 0xc5 */ 
	checkZero(temp);

	temp=(((value&PBES)>>24) & EE2); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0xc7:PCI Bus Error Status     = 0x%02X\n",temp);
	li++;lhIndex[li]=lc; /* index for 0xc7 */ 
	temp=((value&CBE)>>24);
	lc++;sprintf(lh[lc],"     Copy of C/BE* on PCI bus error     = 0x%01X\n",temp);
	temp=((value&MPC)>>28);
	lc++;sprintf(lh[lc],"     MPC107 master/target status        = 0x%01X ",temp);
	printMsg(temp,msgc4MPC0,msgc4MPC1);
	temp=(((value&Z4)>>29) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"     unnamed bits 31 - 29 (7 - 5)       = 0x%01X ",temp);
	checkZero(temp);

	printOrder();
return 0;
}

int Regc8(int value, int part)
{
int B7=0xff000000, B6=0x00ff0000, B5=0x0000ff00, B4=0x000000ff;
int temp;
      if(part == PART_MPC107)
      {
	printf("\nRegc8  Processor/PCI Error Address Reg   = 0x%08x\n",value);
      }
      else  /* MPC106 and MPC8240 HOST and AGENT */
      {
	printf("\nRegc8  60x/PCI Error Address Reg         = 0x%08x\n",value);
      }
	temp=(value&B4);
	lc++;sprintf(lh[lc],"  0xc8:A[0:7]   or AD[31:24]    = 0x%02X\n",temp);
	temp=(value&B5)>>8;
	lc++;sprintf(lh[lc],"  0xc9:A[8:15]  or AD[23:16]    = 0x%02X\n",temp);
	temp=(value&B6)>>16;
	lc++;sprintf(lh[lc],"  0xca:A[16:23] or AD[15:8]     = 0x%02X\n",temp);
	temp=(((value&B7)>>24) & B4); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  0xcb:A[24:32] or AD[7:0]      = 0x%02X\n",temp);

	printOrder();
return 0;
}

int Rege0(int value, int part)
{
int Z1 =0xffffff00, CFD=0x00000080, PFD=0x00000040, Z2=0x00000030,
    PCH=0x00000008, PRC=0x00000004, Z3 =0x00000003, STRIP=0x00ffffff;
int Z4 =0xf0000000, IVR=0x0fff0000, TM =0x0000ff00, STRIP1=0x0000000f,
    Z5 =0x00000080, PIR=0x00000020, PIA=0x00000010, EMW=0x00000002,
    EME=0x00000001;
int temp;
      if(part == PART_MPC8240H) part = PART_MPC107; /* same definition */
      if(part == PART_MPC8240A) part = PART_MPC107; /* same definition */
      if(part == PART_MPC107)
	printf("\nRege0  AMBOR Address Map B Options Reg   = 0x%08x\n",value);
      if(part == PART_MPC106)
	printf("\nRege0  Emulation Support Config 1        = 0x%08x\n",value);

      if(part == PART_MPC107)
      {
	temp=(value&Z3);
	lc++;sprintf(lh[lc],"  unnamed bits 1 - 0            = 0x%01X ",temp);
	checkAllOnes(2,temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&EME);
	lc++;sprintf(lh[lc],"  EMULATION_MODE_EN address map = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
	temp=(value&EMW)>>1;
	lc++;sprintf(lh[lc],"  EMULATION_MODE_HW address map = 0x%01X ",temp);
	checkOne(temp);
      }

/*  PRC and PCH are both MPC106 and MPC107 */
	temp=(value&PRC)>>2;
	lc++;sprintf(lh[lc],"  Proc Compatibility Hole       = 0x%01X ",temp);
	printMsg(temp, msge0PRC0,msge0PRC1);
	temp=(value&PCH)>>3;
	lc++;sprintf(lh[lc],"  PCI  Compatibility Hole       = 0x%01X ",temp);
	printMsg(temp, msge0PCH0,msge0PCH1);

      if(part == PART_MPC107)
      {
	temp=(value&Z2)>>4;
	lc++;sprintf(lh[lc],"  unnamed bits 5 - 4            = 0x%01X ",temp);
	checkZero(temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&PIA)>>4;
	lc++;sprintf(lh[lc],"  PIRQ_ACTIVE_HIGH PIRQ*polarity= 0x%01X ",temp);
	printMsg(temp, msgacHIT0,msgacHIT1);
	temp=(value&PIR)>>5;
	lc++;sprintf(lh[lc],"  PIRQ_EN PIRQ* emulation       = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
      }

/*  PFD are both MPC106 and MPC107 */
	temp=(value&PFD)>>6;
	lc++;sprintf(lh[lc],"  PCI FD Alias En               = 0x%01X ",temp);
	printMsg(temp, msge0PCH1,msge0PCH0);

      if(part == PART_MPC107)
      {
	temp=(value&CFD)>>7;
	lc++;sprintf(lh[lc],"  CPU FD Alias En               = 0x%01X ",temp);
	printMsg(temp, msge0CFD0,msge0CFD1);
	temp=(((value&Z1)>>8) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnamed bits 31 - 8           = 0x%01X ",temp);
	checkZero(temp);
      }
      if(part == PART_MPC106)
      {
	temp=(value&Z5)>>7;
	lc++;sprintf(lh[lc],"  unnamed bit 7                 = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&TM)>>8;
	lc++;sprintf(lh[lc],"  TOP_OF_MEM upper boundry      = 0x%02X\n",temp);
	temp=(value&IVR)>>16;
	lc++;sprintf(lh[lc],"  INT_VECTOR_RELOCATE           = 0x%03X\n",temp);
	temp=(((value&Z4)>>28) & STRIP1); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  unnamed bits 31 - 28          = 0x%01X ",temp);
	checkZero(temp);
      }
	printOrder();
return 0;
}

int Rege4(int value)
{
	Rege4_ec_specific(value,0xe4);
}

int Rege4_ec_specific(int value,int regname)
{
/*  Rege4 and Regec have the same definition */
int HWM=0xfffe0000, LWM=0x0001fffc, MMS=0x00000003, STRIP=0x0000efff;
int temp;
      if(regname == 0xe4)
	printf("\nRege4  Modified memory Status (no clear)= 0x%08x\n", value);
      if(regname == 0xec)
	printf("\nRegec  Modified memory Status (clear)   = 0x%08x\n", value);

	temp=(value&MMS);
	lc++;sprintf(lh[lc],"  MOD_MEM_STATUS HWM, LWM status = 0x%01X ",temp);
	printMsgChoice(NO_PCR, temp, 0, msge4MMS0, 1, msge4MMS1);
	printMsgChoice(PCR, temp, 2, msge4MMS2, 3, msge4MMS3);
	temp=(value&LWM)>>2;
	lc++;sprintf(lh[lc],"  LWM value                      = 0x%04X\n",temp);
	temp=(((value&HWM)>>17)&STRIP); /* strip of sign extension */
	lc++;sprintf(lh[lc],"  HWM value                      = 0x%04X\n",temp);
	printOrder();
}

int Rege8(int value)
{
int  Z1=0xffffff00, MMS=0x000000ff, STRIP=0x00ffffff;
int temp;
	printf("\nRege8  ESCR2 Emulation Support Config 2  = 0x%08x\n",value);
	temp=(value&MMS);
	lc++;sprintf(lh[lc],"     MOD_MEM_SIZE Modified mem reg      = 0x%01X ",temp);
	switch (temp)
        {
	    case 0x80:
	      sprintf(lh[lc]+strlen(lh[lc])," 16 Kbytes (Not supported)\n");
	      break;

	    case 0x40:
	      sprintf(lh[lc]+strlen(lh[lc])," 8 Kbytes \n");
	      break;

	    case 0x20:
	      sprintf(lh[lc]+strlen(lh[lc])," 4 Kbytes \n");
	      break;

	    case 0x10:
	      sprintf(lh[lc]+strlen(lh[lc])," 2 Kbytes (Not supported)\n");
	      break;

	    case 0x8:
	      sprintf(lh[lc]+strlen(lh[lc])," 1 Kbytes (Not supported)\n");
	      break;

	    case 0x4:
	      sprintf(lh[lc]+strlen(lh[lc])," 512 bytes (Not supported)\n");
	      break;

	    case 0x2:
	      sprintf(lh[lc]+strlen(lh[lc])," 256 bytes (Not supported)\n");
	      break;

	    case 0x1:
	      sprintf(lh[lc]+strlen(lh[lc])," 128 bytes (Not supported)\n");
	      break;

	    default:
	      sprintf(lh[lc]+strlen(lh[lc])," Invalid value\n");
	      break;

	}
	temp=(((value&Z1)>>8)&STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"     Unnamed bits 31 - 8                = 0x%06X ",temp);
	checkZero(temp);
	printOrder();
}


int Regec(int value)
{
	Rege4_ec_specific(value,0xec);
}

int Regf0(int value, int part)
{
int RN=0xf0000000, RF=0x0f800000, DBZ=0x00600000, STRIP=0x0000000f;
int MODE501=0x00400000, N64=0x00200000;
int BIT2=0x00000003, BIT1=0x00010000;
char *title[8]={"PCKEN Memory interface parity checking",
                "RAM_TYPE                              ",
                "SREN Self refresh                     ",
                "MEMGO RAM interface logic             ",
                "BURST Burst mode ROM timing           ",};
int temp,i;
	printf("\nRegf0  MCCR1 Memory Control Config Reg   = 0x%08x\n",value);

	
	for(i=0;i<16;i+=2)
	{
	   temp = (value & BIT2)>>i;  /* get bit at location */
	   BIT2 =  BIT2 << 2;            /* next bit position   */
	   lc++;sprintf(lh[lc],"  Bank %1d Row   = 0x%01X ",(i/2),temp);
	   printMsgChoice(NO_PCR, temp, 0, msgf0BANK0, 1, msgf0BANK1);
	   printMsgChoice(PCR, temp, 2, msgf0BANK2, 3, msgf0BANK3);
	}

	for(i=0;i<5;i++)
	{
	   temp = (value & BIT1)>>(i+16);  /* get bit at location */
	   BIT1 =  BIT1 << 1;            /* next bit position   */
	   lc++;sprintf(lh[lc],"  %s   = 0x%01X ",title[i],temp);
	   if(i == 1) printMsg(temp,msgf0RMT0,msgf0RMT1);
	   else if(i==4) printMsg(temp,msgf0BRST0,msgf0BRST1);
	        else printMsg(temp, msg70PM0, msg70PM1);
	}

     if(part == PART_MPC106)
     {
	temp=(value&N64)>>21;
	lc++;sprintf(lh[lc],"  8N64 ROM bank0 data path width= 0x%01X ",temp);
        printMsg(temp, msgf0N640, msgf0N641);
	temp=(value&MODE501)>>22;
	lc++;sprintf(lh[lc],"  501 _MODE                     = 0x%01X ",temp);
        printMsg(temp, msgf0MODE50, msgf0MODE51);
     }
     else  /*  MPC107 or MPC8240 */
     {
	temp=(value&DBZ)>>21;
	lc++;sprintf(lh[lc],"  DBUS_SIZ[0-1]                 = 0x%01X\n",temp);
     }

	temp=(value&RF)>>23;
	lc++;sprintf(lh[lc],"  ROMFAL access time            = 0x%02X\n",temp);
	temp=(((value&RN)>>28) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  ROMNAL next access time       = 0x%01X\n",temp);

	printOrder();
return 0;
}

int Regf4(int value, int part)
{
int TSW=0xe0000000, ASR=0x1e000000, ASF=0x01e00040, IPE=0x00100000,
    IWE=0x00080000, IPC=0x00040000, ECC=0x00020000, EDO=0x00010000,
    REF=0x0000fffc, RSV=0x00000002, RWM=0x00000001, STRIP=0x00000007,
    TSWAIT=0xe0000000,Z1=0x1fc00000,BST=0x00300000,PAR=0x00080000,
    ECC1  =0x00040000;
int temp;
	printf("\nRegf4  MCCR2 Memory Control Config Reg   = 0x%08x\n",value);
	temp=(value&RWM);
	lc++;sprintf(lh[lc],"  Read Modify Write parity      = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);

     if(part == PART_MPC106)
     {
	temp=(value&RSV)>>1;
	lc++;sprintf(lh[lc],"  BUF_MODE BCTL0 & BCTL1 mode   = 0x%01X ",temp);
	printMsg(temp, msgf4BUF0,msgf4BUF1);
     }
     else
     {  /* mpc107 or mpc8240 */
	temp=(value&RSV)>>1;
	lc++;sprintf(lh[lc],"  RSV_PG Reserve one open page  = 0x%01X ",temp);
	printMsg(temp, msgf4RSV0,msgf4RSV1);
     }

	temp=(value&REF)>>3;
	lc++;sprintf(lh[lc],"  Refresh Interval              = 0x%04X = %d decimal\n",temp,temp);
	temp=(value&EDO)>>16;
	lc++;sprintf(lh[lc],"  EDO Enable                    = 0x%01X ",temp);
	printMsg(temp, msgf4EDO0,msgf4EDO1);
	temp=(value&ECC)>>17;
	lc++;sprintf(lh[lc],"  ECC enable                    = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);

     if(part == PART_MPC106)
     {
	temp=(((value&TSWAIT)>>29) & STRIP);
	lc++;sprintf(lh[lc],"  TS_WAIT_TIMER                 = 0x%01X ",temp);
	printTS_WAIT(temp);
	temp=(value&Z1)>>22;
	lc++;sprintf(lh[lc],"  unnamed bits 28 - 22          = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&BST)>>20;
	lc++;sprintf(lh[lc],"  BSTOPRE[0-1]                  = 0x%01X\n",temp);
	temp=(value&PAR)>>19;
	lc++;sprintf(lh[lc],"  EXT_ECM_PAR_EN external parity= 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
	temp=(value&ECC1)>>18;
	lc++;sprintf(lh[lc],"  EXT_ECM_ECC_EN external parity= 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
     }
     else
     {   /*  mpc107 or mpc8240 */
	temp=(value&IPC)>>18;
	lc++;sprintf(lh[lc],"  Inline Read Parity enable     = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
	temp=(value&IWE)>>19;
	lc++;sprintf(lh[lc],"  Inline Report Parity enable   = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
	temp=(value&IPE)>>20;
	lc++;sprintf(lh[lc],"  Inline Parity not ECC         = 0x%01X ",temp);
	printMsg(temp, msg70PM0,msg70PM1);
	temp=(value&ASF)>>21;
	lc++;sprintf(lh[lc],"  ASFALL timing                 = 0x%01X clocks\n",temp);
	temp=(value&ASR)>>25;
	lc++;sprintf(lh[lc],"  ASRISE timing for Port X      = 0x%01X clocks\n",temp);
	temp=(((value&TSW)>>29) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  TS Wait Timer                 = 0x%01X ",temp);
	printMsgChoice(NO_PCR, temp, 0, msgf4TS2, 1, msgf4TS2);
	printMsgChoice(NO_PCR, temp, 2, msgf4TS3, 3, msgf4TS4);
	printMsgChoice(NO_PCR, temp, 4, msgf4TS5, 5, msgf4TS6);
	printMsgChoice(PCR, temp, 6, msgf4TS7, 7, msgf4TS8);
     }   /*  mpc107 or mpc8240 */

	printOrder();
return 0;
}


int Regf8(int value, int part)
{
int CPX=0x00080000, RDLAT=0x00f00000, RAS=0x00078000, BIT3=0x00000007;
int REF=0x0f000000, BST  =0xf0000000, STRIP=0x0000000f;
int temp,i;
char *title3[5]={"RAS precharge interval RP1 DRAM  ",
                "RAS CAS delay interval RCD2 DRAM ",
                "CAS assertion interval CAS3 DRAM ",
                "CAS precharge interval CP4  DRAM ",
                "CAS assertion interval CAS5 DRAM "};
	printf("\nRegf8 MCCR3 Memory Control Config Reg 3 = 0x%08x\n",value);

	for(i=0;i<5;i++)
	{
	   temp = (value & BIT3)>>(i*3);  /* get bit at location */
	   BIT3 =  BIT3 << 3;            /* next bit position   */
	   lc++;sprintf(lh[lc],"  %s     = 0x%01X ",title3[i],temp);
	   switch(i)
	   {
	    case 0:
	      if(part == PART_MPC106)
		printMCCR3(temp,2,7,0,100);
              else  /* mpc107 or mpc8240 */
		printMCCR3(temp,2,5,100,100);
	 	break;

	    case 1:
	    case 2:
	    case 4:
		printMCCR3(temp,1,7,0,100);
	 	break;

	    case 3:
	      if(part == PART_MPC106)
		printMCCR3(temp,1,7,0,100);
              else  /* mpc107 or mpc8240 */
		printMCCR3(temp,1,2,100,100);
	 	break;
	   }
	}

	temp=(value&RAS)>>15;
	lc++;sprintf(lh[lc],"  RAS assertion interval for CBR DRAM   = 0x%01X ",temp);
	printMCCR3(temp,1,15,100,0);
	temp=(value&CPX)>>19;
	lc++;sprintf(lh[lc],"  CAS write timing modifier DRAM        = 0x%01X ",temp);
	printMsg(temp,msgf8CAS0,msgf8CAS1);
	temp=(value&RDLAT)>>20;
	lc++;sprintf(lh[lc],"  Data Latency from read command        = 0x%01X ",temp);
    if(part == PART_MPC106)
	printMCCR3(temp,1,4,100,100);
    else  /*  mpc107 or mpc8240 */
	printMCCR3(temp,1,6,100,100);
	temp=(value&REF)>>24;
	lc++;sprintf(lh[lc],"  Refresh to activate interval          = 0x%01X ",temp);
	printMCCR3(temp,1,15,100,0);
	temp=(((value&BST)>>28) & STRIP);
	lc++;sprintf(lh[lc],"  Burst to precharge  BSTOPRE[2-5]      = 0x%01X\n",temp);


	printOrder();
return 0;
}

int Regfc(int value, int part)
{
int PRET=0xf0000000, ACTP= 0x0f000000, WMODE=0x00800040, BUF0=0x00600000,
    Z21 =0x00400000, INLINE=0x00200000,
    BUF1=0x00100000, BSTP= 0x000c0000, DBUS=0x00020000,
    Z1 = 0x00010000, REGD=0x00008000, SDMOD=0x00007f00, ACT= 0x000000f0,
    BST= 0x0000000f, STRIP=0x0000000f;

int temp;
    if(part == PART_MPC106)
    {
	Regfc_MPC106(value);
    }
    else  /* mpc107 and mpc8240 */
    {
	printf("\nRegfc  MCCR4 Memory Control Config Reg 4 = 0x%08x\n",value);
	temp=(value&BST);
	lc++;sprintf(lh[lc],"  Burst to Precharge BSTOPRE_L  = 0x%01X\n",temp);
	temp=(value&ACT)>>4;
	lc++;sprintf(lh[lc],"  Activate to R/W int    ACTORW = 0x%01X ",temp);
	printMCCR3(temp,1,15,100,0);
	temp=(value&SDMOD)>>8;
	lc++;sprintf(lh[lc],"  SDRAM mode Register           = 0x%02X\n",temp);
	decodeSDMODE_107(temp);
	temp=(value&REGD)>>15;
	lc++;sprintf(lh[lc],"  REGDIMM                       = 0x%01X\n",temp);
	temp=(value&Z1)>>16;
	lc++;sprintf(lh[lc],"  Unnamed bit 16                = 0x%01X ",temp);
	checkZero(temp);

      if( (part == PART_MPC8240H) || (part == PART_MPC8240A) )
      {
	temp=(value&DBUS)>>17;
	lc++;sprintf(lh[lc],"8240 Reserved:  DEBUS_SIZE                    = 0x%01X\n",temp);
      }
      else
      {
	temp=(value&DBUS)>>17;
	lc++;sprintf(lh[lc],"  DEBUS_SIZE                    = 0x%01X\n",temp);
      }

	temp=(value&BSTP)>>18;
	lc++;sprintf(lh[lc],"  Burst to precharge bits 0-1   = 0x%01X\n",temp);

      if(part == PART_MPC107)
      {
	temp=(value&BUF1)>>20;
	lc++;sprintf(lh[lc],"  Least sig bit of memory data  = 0x%01X\n",temp);
	temp=(value&BUF0)>>21;
	lc++;sprintf(lh[lc],"  Most sig bit of memory data   = 0x%01X ",temp);
	printMsgChoice(NO_PCR, temp, 0, msga8CMM1, 1, msgfcBUF0);
	printMsgChoice(PCR, temp, 2, msgfcBUF1, 3, msga8CMM1);
      }
      else
      {     /*  MPC8240 */
	temp=(value&BUF1)>>20;
	lc++;sprintf(lh[lc],"  Registered Memory interface   = 0x%01X ",temp);
	printMsg(temp,msgfcBUF0,msgfcBUF1);
	temp=(value&Z21)>>21;
	lc++;sprintf(lh[lc],"  Unnamed bit 21                = 0x%01X ",temp);
	checkZero(temp);
	temp=(value&INLINE)>>22;
	lc++;sprintf(lh[lc],"  Enable inline ECC and parity  = 0x%01X ",temp);
	printMsg(temp,msg70PM0,msg70PM1);
      }

	temp=(value&WMODE)>>23;
	lc++;sprintf(lh[lc],"  Length of burst               = 0x%01X ",temp);
	printMsg(temp,msgfcWM0,msgfcWM1);
	temp=(value&ACTP)>>24;
	lc++;sprintf(lh[lc],"  Activate to precharge interval= 0x%01X ",temp);
	printMCCR3(temp,1,15,100,0);
	temp=(((value&PRET)>>28) & STRIP); /* strip off sign extension */
	lc++;sprintf(lh[lc],"  Precharge to activate interval= 0x%01X ",temp);
	printMCCR3(temp,1,15,100,0);
    }  /* end else mpc107 or mpc8240 */

	printOrder();
return 0;
}