/* Copyright Motorola, Inc. 1993, 1994, 1999, 2000 ALL RIGHTS RESERVED You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE so long as this entire notice is retained without alteration in any modified and/or redistributed versions, and that such modified versions are clearly identified as such. No licenses are granted by implication, estoppel or otherwise under any patents or trademarks of Motorola, Inc. The SOFTWARE is provided on an "AS IS" basis and without warranty. To the maximum extent permitted by applicable law, MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) AND ANY ACCOMPANYING WRITTEN MATERIALS. To the maximum extent permitted by applicable law, IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. Motorola assumes no responsibility for the maintenance and support of the SOFTWARE. */ /* config_regs1.c functions to decode config registers that are * considerable different than the MPC107 * (i.e. MPC106, MPC8240) * * decode these specific configuration registers * * mo 6/14/00 * */ /* Includes */ #include "config_decoder.h" int Reg70_MPC106(int value) /* for the mpc106 only */ { int Z1=0xff000000, PM2=0x00ff0000, PM1=0x0000ffff, STRIP=0x000000ff; int Z2=0x00fe0000, SMCP=0x00010000; int NN =0x00008000, NS =0x00004000, SMT=0x00002000, LP =0x00001000, NO6=0x00000800, NED=0x00000400, SQ =0x00000200, Z3 =0x00000100, PM =0x00000080, Z4 =0x00000040, DOZ=0x00000020, NAP=0x00000010, SLP=0x00000008, CKO=0x00000060, BR1=0x00000001; int temp; printf("\nReg70 Power Management & Output Driver = 0x%08x\n",value); temp=(value&PM1); lc++;sprintf(lh[lc]," 0x70:Power Management Register 1 = 0x%04X\n",temp); li++;lhIndex[li]=lc; /* index for 0x70 */ temp=value&BR1; lc++;sprintf(lh[lc]," BR1_WAKE awareness of other CPUs = 0x%01X ",temp); printMsg(temp,msg70BR0,msg70BR0); temp=(value&CKO)>>1; lc++;sprintf(lh[lc]," Selects Clock Source = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70CKM0,1,msg70CKM1); printMsgChoice(PCR,temp,2,msg70CKM2,3,msg70CKM3); temp=(value&SLP)>>3; lc++;sprintf(lh[lc]," Sleep Mode = 0x%01X ",temp); printMsg(temp,msg70SP0,msg70SP1); temp=(value&NAP)>>4; lc++;sprintf(lh[lc]," Nap Mode = 0x%01X ",temp); printMsg(temp,msg70NP0,msg70NP0); temp=(value&DOZ)>>5; lc++;sprintf(lh[lc]," Doze Mode = 0x%01X ",temp); printMsg(temp,msg70DZ0,msg70DZ1); temp=(value&Z4)>>6; lc++;sprintf(lh[lc]," unnammed bit 6 = 0x%01X ",temp); checkZero(temp); temp=(value&PM)>>7; lc++;sprintf(lh[lc]," Power Management Enable = 0x%01X ",temp); printMsg(temp,msg70PM0,msg70PM1); temp=(value&Z3)>>8; lc++;sprintf(lh[lc]," unnammed bits 9 - 8 = 0x%01X ",temp); checkZero(temp); temp=(value&SQ)>>9; lc++;sprintf(lh[lc]," Suspend Mode QACK* = 0x%01X ",temp); printMsg(temp,msg70SQ0,msg70SQ1); temp=(value&NED)>>10; lc++;sprintf(lh[lc]," 601_NEED_QREQ use the QREQ nap = 0x%01X ",temp); printMsg(temp,msg70NED0,msg70NED1); temp=(value&NO6)>>11; lc++;sprintf(lh[lc]," NO_604_RUN assert QUAK on wake = 0x%01X ",temp); printMsg(temp,msg70NO60,msg70NO61); temp=(value&LP)>>12; lc++;sprintf(lh[lc]," Low Power Refresh = 0x%01X ",temp); printMsg(temp,msg70LP0,msg70LP1); temp=(value&SMT)>>13; lc++;sprintf(lh[lc]," Sleep Message Type = 0x%01X ",temp); printMsg(temp,msg70SMT0,msg70SMT1); temp=(value&NS)>>14; lc++;sprintf(lh[lc]," No Sleep Message Broadcast = 0x%01X ",temp); printMsg(temp,msg70NS0,msg70NS1); temp=(value&NN)>>15; lc++;sprintf(lh[lc]," No Nap Msg Halt command Broadcast = 0x%01X ",temp); printMsg(temp,msg70NN0,msg70NN1); temp=(value&PM2)>>16; lc++;sprintf(lh[lc]," 0x72:Power Management Register 2 = 0x%02X\n",temp); li++;lhIndex[li]=lc; /* index for 0x72 */ temp=(value&Z2)>>17; lc++;sprintf(lh[lc]," unnammed bit 7 - 1 = 0x%01X ",temp); checkZero(temp); temp=(value&SMCP)>>16; lc++;sprintf(lh[lc]," Shared MPC = 0x%01X ",temp); printMsg(temp,msg70SMCP0,msg70SMCP1); temp=(((value&Z1)>>24) & STRIP); /* strip off sign extension */ Reg70_ODCR_106(temp); return 0; } int Regac_MPC106(int value) /* for the mpc106 only */ { int L2U=0x80000000, L2EN=0x40000000, NOSC=0x20000000, CFF=0x10000000, NSE=0x08000000, CFF0=0x04000000, FWRL=0x02000000, CFL2=0x01000000, CVD=0x00c00000, CFWM=0x00300000, CFSW=0x000c0000, CFMH=0x00020000, HIT=0x00010000, Z1 =0x00008000, AOD =0x00004000, HOLD=0x00002000, INV=0x00001000, RWIT=0x00000800, L2HD=0x00000600, TWOB=0x00000100, FSC=0x00000080, TOEW=0x00000040, L2SZ=0x00000030, APHW=0x0000000c, DOE=0x00000002, WDAT=0x00000001; int temp; printf("\nRegac PICR2 Processor Interface Config 2= 0x%08x\n",value); temp=value&WDAT; lc++;sprintf(lh[lc]," CF_WDATA = 0x%01X\n",temp); temp=(value&DOE)>>1; lc++;sprintf(lh[lc]," CF_DOE L2 first data read timing = 0x%01X ",temp); printMsg(temp,msgacDOE0,msgacDOE1); temp=value&APHW>>2; lc++;sprintf(lh[lc]," CF_APHASE_WS address phase wait sts= 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msgacCFA0,1,msgacCFA1); printMsgChoice(PCR,temp,2,msgacCFA2,3,msgacCFA3); temp=(value&L2SZ)>>4; lc++;sprintf(lh[lc]," L2 cache size = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msgacL2SZ0,1,msgacL2SZ1); printMsgChoice(PCR,temp,2,msgacL2SZ2,3,msga8CMM1); temp=value&TOEW>>6; lc++;sprintf(lh[lc]," CF_TOE_WIDTH TOE active pulse width= 0x%02X ",temp); printMsg(temp,msgacCFB2,msgacCFB3); temp=(value&FSC)>>7; lc++;sprintf(lh[lc]," CF_FAST_CACTOUT timing = 0x%01X ",temp); printMsg(temp,msgacFSC0,msgacFSC1); temp=value&TWOB>>8; lc++;sprintf(lh[lc]," CF_TWO_BANKS L2 cache banks = 0x%02X ",temp); printMsg(temp,msgacTWOB0,msgacTWOB1); temp=(value&L2HD)>>9; lc++;sprintf(lh[lc]," CF_L2_HIT_DELAY = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msga8CMM1,1,msgacCFB1); printMsgChoice(PCR,temp,2,msgacCFB2,3,msgacCFB3); temp=(value&RWIT)>>11; lc++;sprintf(lh[lc]," CF_RWITM_FILL line fill disable = 0x%01X ",temp); printMsg(temp,msg74CK0,msg74CK1); temp=(value&INV)>>12; lc++;sprintf(lh[lc]," CF_INV_MODE L2 Invalidate Mode = 0x%01X ",temp); printMsg(temp,msg74CK1,msg74CK0); temp=value&HOLD>>13; lc++;sprintf(lh[lc]," CF_HOLD L2 tag address hold = 0x%01X ",temp); printMsg(temp,msgacHOLD0,msgacHOLD1); temp=(value&AOD)>>14; lc++;sprintf(lh[lc]," CF_ADDR_ONLY_DISABLE clean,flush,kill = 0x%01X ",temp); printMsg(temp,msgacAOD0,msgacAOD1); temp=(value&Z1)>>15; lc++;sprintf(lh[lc]," unnamed bit 15 = 0x%01X ",temp); checkZero(temp); temp=(value&HIT)>>16; lc++;sprintf(lh[lc]," CF_HIT_HIGH L2 HIT* signal = 0x%01X ",temp); printMsg(temp,msgacHIT0,msgacHIT1); temp=(value&CFMH)>>17; lc++;sprintf(lh[lc]," CF_MOD_HIGH Cache modified sig = 0x%01X ",temp); printMsg(temp,msgacHIT0,msgacHIT1); temp=(value&CFSW)>>18; lc++;sprintf(lh[lc]," CF_SNOOP_WS Snoop wait states = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msgacCFA0,1,msgacCFA1); printMsgChoice(PCR,temp,2,msgacCFA2,3,msgacCFA3); temp=(value&CFWM)>>20; lc++;sprintf(lh[lc]," CF_WMODE SRAM write timing = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msgacCFWM0,1,msgacCFWM1); printMsgChoice(PCR,temp,2,msgacCFWM2,3,msgacCFWM3); temp=(value&CVD)>>22; lc++;sprintf(lh[lc]," CF_DATA_RAM_TYPE L2 RAM type = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msgacCVD0,1,msgacCVD1); printMsgChoice(PCR,temp,2,msgacCVD2,3,msga8CMM1); temp=(value&CFL2)>>24; lc++;sprintf(lh[lc]," CF_FAST_L2_MODE fast mode disable = 0x%01X ",temp); printMsg(temp,msg74CK1,msg74CK0); temp=(value&FWRL)>>25; lc++;sprintf(lh[lc]," FLASH_WR_LOCKOUT write lockout = 0x%01X ",temp); printMsg(temp,msg74CK0,msg74CK1); temp=(value&CFF0)>>26; lc++;sprintf(lh[lc]," CF_FF0_LOCAL remapping enable = 0x%01X ",temp); printMsg(temp,msg74CK1,msg74CK0); temp=(value&NSE)>>27; lc++;sprintf(lh[lc]," NO_SNOOP_EN snoop transactions = 0x%01X ",temp); printMsg(temp,msg74CK0,msg74CK1); temp=(value&NOSC)>>29; lc++;sprintf(lh[lc]," NO_SERIAL_CFG serialize wr to PCI = 0x%01X ",temp); printMsg(temp,msg70NO61,msg70NO60); temp=(value&L2EN)>>30; lc++;sprintf(lh[lc]," L2_EN L2 cache enable = 0x%01X ",temp); printMsg(temp,msg74CK1,msg74CK0); temp=(value&L2U>>31)&0x1; /*strip off sign extension */ lc++;sprintf(lh[lc]," L2_UPDATE_EN L2 update enable = 0x%01X ",temp); printMsg(temp,msg74CK0,msg74CK1); /* printOrder is done in Regac in config_regs.c */ return 0; } int Reg70_MPC8240(int value) { int ODC=0xff000000, PM2=0x00ff0000, PM1=0x0000ffff, STRIP=0x000000ff; int CK=0x00000001, CKM=0x00000006, SLP=0x00000008, NAP=0x0000001, DOZE=0x00000020, Z1 =0x00000040, PM=0x00000080, Z2=0x00000f00, LP= 0x00001000, Z4 =0x00002000, NS=0x00004000, NN=0x00008000; int SMCP=0x00010000, Z5 =0x00020000, PSL=0x00040000, Z6=0x00080000, PHD=0x00700000, DE=0x00800000; int temp; printf("\nReg70 Power Management & Output Driver = 0x%08x\n",value); temp=(value&PM1); lc++;sprintf(lh[lc]," 0x70:Power Management Register 1 = 0x%04X\n",temp); li++;lhIndex[li]=lc; /* index for 0x70 */ temp=value&CK; lc++;sprintf(lh[lc]," CK0_SEL processor vrs logic clock = 0x%01X ",temp); printMsg(temp,msg70CK0,msg70CK1); temp=(value&CKM)>>1; lc++;sprintf(lh[lc]," Selects Clock Source = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70CKM0,1,msg70CKM1); printMsgChoice(PCR,temp,2,msg70CKM2,3,msg70CKM3); temp=(value&SLP)>>3; lc++;sprintf(lh[lc]," Sleep Mode = 0x%01X ",temp); printMsg(temp,msg70SP0,msg70SP1); temp=(value&NAP)>>4; lc++;sprintf(lh[lc]," Nap Mode = 0x%01X ",temp); printMsg(temp,msg70NP0,msg70NP0); temp=(value&DOZE)>>5; lc++;sprintf(lh[lc]," Doze Mode = 0x%01X ",temp); printMsg(temp,msg70DZ0,msg70DZ1); temp=(value&Z1)>>6; lc++;sprintf(lh[lc]," Unnamed bit 6 = 0x%01X ",temp); checkZero(temp); temp=(value&PM)>>7; lc++;sprintf(lh[lc]," Power Management Enable = 0x%01X ",temp); printMsg(temp,msg70PM0,msg70PM1); temp=(value&Z2)>>8; lc++;sprintf(lh[lc]," unnammed bits 11 - 8 = 0x%01X ",temp); checkZero(temp); temp=(value&LP)>>12; lc++;sprintf(lh[lc]," Low Power Refresh = 0x%01X ",temp); printMsg(temp,msg70LP0,msg70LP1); temp=(value&Z4)>>13; lc++;sprintf(lh[lc]," unnammed bit 13 = 0x%01X ",temp); checkZero(temp); temp=(value&NS)>>14; lc++;sprintf(lh[lc]," No Sleep Message Broadcast = 0x%01X ",temp); sprintf(lh[lc]+strlen(lh[lc])," Not supported Must be 1\n"); temp=(value&NN)>>15; lc++;sprintf(lh[lc]," No Nap Msg Halt command Broadcast = 0x%01X ",temp); sprintf(lh[lc]+strlen(lh[lc])," Not supported Must be 1\n"); temp=(value&PM2)>>16; lc++;sprintf(lh[lc]," 0x72:Power Management Register 2 = 0x%02X\n",temp); li++;lhIndex[li]=lc; /* index for 0x72 */ temp=(value&SMCP)>>16; lc++;sprintf(lh[lc]," SHARED_MCP share MCP* signal = 0x%01X ",temp); printMsg(temp,msg70SMCP0,msg70SMCP2); temp=(value&Z5)>>17; lc++;sprintf(lh[lc]," Unnamed bit 1 = 0x%01X ",temp); checkZero(temp); temp=(value&PSL)>>18; lc++;sprintf(lh[lc]," Sampling When Waking from Suspend = 0x%01X ",temp); printMsg(temp,msg70PSS0,msg70PSS1); temp=(value&Z6)>>19; lc++;sprintf(lh[lc]," unnammed bit 3 = 0x%01X ",temp); checkZero(temp); temp=(value&PHD)>>20; lc++;sprintf(lh[lc]," PCI Hold Delay = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70PHD0,1,msg70PHD1); printMsgChoice(PCR,temp,4,msg70PHD4,6,msg70PHD6); temp=(value&DE)>>23; lc++;sprintf(lh[lc]," DLL Extend = 0x%01X ",temp); printMsg(temp,msg70DE0,msg70DE1); Reg70_ODCR(value); return 0; } int Reg70_ODCR(value) /* same for MPC107 and MPC8240 Host and Agent */ { int ODC=0xff000000, STRIP=0x000000ff, STRIP1=0x00000001; int DMC=0x03000000, CPC=0x0c000000, DMCT=0x30000000, DCPU=0x40000000, DPCI=0x80000000; int temp; temp=(((value&ODC)>>24) & STRIP); /* strip off sign extension */ lc++;sprintf(lh[lc]," 0x73:Output Driver Config Reg = 0x%02X\n",temp); li++;lhIndex[li]=lc; /* index for 0x73 */ temp=(value&DMC)>>24; lc++;sprintf(lh[lc]," Driver Memory Clock SDRAM_CLK = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70DMC0,1,msg70DMC1); printMsgChoice(PCR,temp,2,msg70DMC2,3,msg70DMC3); temp=(value&CPC)>>26; lc++;sprintf(lh[lc]," Driver PCI Clock PCI_CLK = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70DMC0,1,msg70DMC1); printMsgChoice(PCR,temp,2,msg70DMC2,3,msg70DMC3); temp=(value&DMCT)>>28; lc++;sprintf(lh[lc]," Driver Memory Control MDH,MDL = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70DMC0,1,msg70DMC1); printMsgChoice(PCR,temp,2,msg70DMC2,3,msg70DMC3); temp=(value&DCPU)>>30; lc++;sprintf(lh[lc]," Driver Capability CPU signals = 0x%01X ",temp); printMsg(temp,msg70DCPU0,msg70DCPU1); temp=(((value&DPCI)>>31) & STRIP1); /* strip off sign extension */ lc++;sprintf(lh[lc]," Driver Capability PCI signals = 0x%01X ",temp); printMsg(temp,msg70DCPU0,msg70DCPU1); return 0; } int Reg70_ODCR_106(value) /* Specifically for MPC106, which is different from MPC107 and * MPC8240 Host and Agent */ { int PCIAD =0x00000080, PCICTRL=0x00000040, DHDL =0x00000020, MEMC2 =0x00000010, PROCA =0x00000008, PROCC1 =0x00000004, PROCC2=0x00000002, MEMC1 =0x00000001; int temp,temp1; lc++;sprintf(lh[lc]," 0x73:Output Driver Config Reg = 0x%02X\n",value); li++;lhIndex[li]=lc; /* index for 0x73 */ temp1=(value&MEMC1); lc++;sprintf(lh[lc]," MEM_CTRL1 mem signal driver = 0x%01X\n",temp1); temp=(value&PROCC2)>>1; lc++;sprintf(lh[lc]," PROC_CTRL2 proc/L2 signal 2 = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); temp=(value&PROCC1)>>2; lc++;sprintf(lh[lc]," PROC_CTRL1 proc/L2 signal 1 = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); temp=(value&PROCA)>>3; lc++;sprintf(lh[lc]," PROC_A address bus signal driver = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); temp=(value&MEMC2)>>4; lc++;sprintf(lh[lc]," MEM_CTRL2 mem signal driver = 0x%01X\n ",temp); temp=temp1+(temp<<1); lc++;sprintf(lh[lc]," Combined MEM_CTRL2 & MEM_CTRL1 = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msga8CMM1,1,msg73DMC1); printMsgChoice(PCR,temp,2,msg73DMC2,3,msg73DMC3); temp=(value&DHDL)>>5; lc++;sprintf(lh[lc]," PROC_A address bus singal driver = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); temp=(value&PCICTRL)>>6; lc++;sprintf(lh[lc]," PCI_CTRL control signal driver = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); temp=(value&PCIAD)>>7; lc++;sprintf(lh[lc]," PCI_AD address/data signal driver = 0x%01X ",temp); printMsg(temp,msg73DMC4,msg73DMC1); return 0; } int Regfc_MPC106(int value) { int PRET=0xf0000000, ACTP= 0x0f000000, ECM=0x00c00000, WCBUF=0x00200040, RCBUF=0x00100000, SDMODE=0x000fff00, ACT= 0x000000f0, BST= 0x0000000f, STRIP=0x0000000f; int temp; printf("\nRegfc MCCR4 Memory Control Config Reg 4 = 0x%08x\n",value); temp=(value&BST); lc++;sprintf(lh[lc]," Burst to Prechrg BSTOPRE[6-9] = 0x%01X\n",temp); temp=(value&ACT)>>4; lc++;sprintf(lh[lc]," Activate to R/W int ACTORW = 0x%01X ",temp); printMCCR3(temp,1,15,100,0); temp=(value&SDMODE)>>8; lc++;sprintf(lh[lc]," SDRAM mode Register SDMODE = 0x%02X\n",temp); decodeSDMODE_106(temp); temp=(value&RCBUF)>>20; lc++;sprintf(lh[lc]," RCBUF memory write buffer type= 0x%01X ",temp); printMsg(temp,msgfcRCBUF0,msgfcRCBUF1); temp=(value&WCBUF)>>21; lc++;sprintf(lh[lc]," WCBUF memory read buffer type = 0x%01X ",temp); printMsg(temp,msgfcWCBUF0,msgfcWCBUF1); temp=(value&ECM)>>22; lc++;sprintf(lh[lc]," EXT_ECM_EN external error mod = 0x%01X ",temp); printMsgChoice(NO_PCR,temp,0,msg70PM0,1,msga8CMM1); printMsgChoice(PCR,temp,2,msga8CMM1,3,msg70PM1); temp=(value&ACTP)>>24; lc++;sprintf(lh[lc]," Act to precharge int ACTOPRE = 0x%01X ",temp); printMCCR3(temp,1,15,100,0); temp=(((value&PRET)>>28) & STRIP); /* strip off sign extension */ lc++;sprintf(lh[lc]," Prechrg to act int PRETOACT = 0x%01X ",temp); printMCCR3(temp,1,15,100,0); return 0; } int Reg48(int value, int part) { int T_L = 0xff000000, T_U = 0x00ff0000, E_L=0x0000e000, Z1=0x00001f00, CNTR= 0x000000c0, CMDT= 0x00000020, E_U=0x0000001f, STRIP=0x000000ff; int temp; printf("\nReg48 CMDR Perfrm Mon Cmd Reg = 0x%08x\n",value); if(part != PART_MPC106) { lc++;sprintf(lh[lc],"This register only valid for MPC106\n"); printOrder(); return 0; } temp=(value&E_U); lc++;sprintf(lh[lc]," EVENT_U upper = 0x%x\n",temp); temp=((value&CMDT)>>5); lc++;sprintf(lh[lc]," CMD_TYPE which table = 0x%x ",temp); printMsg(temp, msg48CMDT0,msg48CMDT1); temp=((value&CNTR)>>6); lc++;sprintf(lh[lc]," COUNTER which counter = 0x%x ",temp); printMsgChoice(NO_PCR, temp, 0, msg48C0, 1, msg48C1); printMsgChoice(PCR, temp, 2, msg48C2, 3, msg48C3); temp=((value&Z1)>>8); lc++;sprintf(lh[lc]," Unnamed bits 12-8 = 0x%x ",temp); checkZero(temp); temp=((value&E_L)>>13); lc++;sprintf(lh[lc]," EVENT_L lower = 0x%x\n",temp); temp=((value&T_U)>>16); lc++;sprintf(lh[lc]," THRESHOLD_U upper = 0x%x\n",temp); temp=(((value&T_L)>>24) & STRIP); /* strip off sign extension */ lc++;sprintf(lh[lc]," THRESHOLD_L lower = 0x%x\n",temp); printOrder(); return 0; } int Reg4c(int value, int part) { int Z1=0xffff0000; int OV1 = 0x00008000, OV3 = 0x00004000, Z2 =0x00001f00, EN=0x00000080, DISC= 0x00000040, Z3 = 0x0000003e, PMC=0x00000001, STRIP=0x0000ffff; int temp; printf("\nReg4c MMCR Perfrm Mon Mode Reg= 0x%08x\n",value); if(part != PART_MPC106) { lc++;sprintf(lh[lc],"This register only valid for MPC106\n"); printOrder(); return 0; } temp=(value&PMC); lc++;sprintf(lh[lc]," PMCTRG PMC0 msb from 0 to 1 = 0x%x ",temp); printMsg(temp, msg4cPMC0,msg4cPMC1); temp=((value&Z3)>>1); lc++;sprintf(lh[lc]," Unnamed bits 5-1 = 0x%x ",temp); checkZero(temp); temp=((value&DISC)>>6); lc++;sprintf(lh[lc]," DISCOUNT PMCx msb from 0 to 1 = 0x%x ",temp); printMsg(temp, msg4cDISC0,msg4cDISC1); temp=((value&EN)>>7); lc++;sprintf(lh[lc]," ENABLE counters = 0x%x ",temp); printMsg(temp, msg70PM0,msg70PM1); temp=((value&Z2)>>8); lc++;sprintf(lh[lc]," Unnamed bits 13-8 = 0x%x ",temp); checkZero(temp); temp=((value&OV3)>>14); lc++;sprintf(lh[lc]," OVERFLOW 2-3 PMC2 into PMC3 = 0x%x ",temp); printMsg(temp, msg70PM0,msg70PM1); temp=((value&OV3)>>14); lc++;sprintf(lh[lc]," OVERFLOW 0-1 PMC0 into PMC1 = 0x%x ",temp); printMsg(temp, msg70PM0,msg70PM1); printOrder(); return 0; } int Reg50(int value, int part) { printf("\nReg50 PMC0 Perfrm Mon Counter = 0x%08x\n",value); if(part != PART_MPC106) { printf("This register only valid for MPC106\n"); return 0; } return 0; } int Reg54(int value, int part) { printf("\nReg54 PMC1 Perfrm Mon Counter = 0x%08x\n",value); if(part != PART_MPC106) { printf("This register only valid for MPC106\n"); return 0; } return 0; } int Reg58(int value, int part) { printf("\nReg58 PMC2 Perfrm Mon Counter = 0x%08x\n",value); if(part != PART_MPC106) { printf("This register only valid for MPC106\n"); return 0; } return 0; } int Reg5c(int value, int part) { printf("\nReg5c PMC3 Perfrm Mon Counter = 0x%08x\n",value); if(part != PART_MPC106) { printf("This register only valid for MPC106\n"); return 0; } return 0; }