#line 33 "mpc107.s"
.file "mpc107.s"


 
#line 2 "yellowknife.h" /* from mpc107.s */
 

 
#line 27 "config.h" /* from yellowknife.h from mpc107.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 9 "yellowknife.h" /* from mpc107.s */
 

 

 
 
 
#line 48
 
#line 154
  

 
 
 
 

 
 
 
 
#line 176
 

 
#line 197
 
#line 234
 
#line 241
 
 
#line 258
       
       
 
#line 266
 
#line 280
 
#line 290
       
#line 297
 

 
#line 318
 
#line 27 "config.h" /* from yellowknife.h from mpc107.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 27
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 2 "yellowknife.h" /* from mpc107.s */
 

 
#line 27 "config.h" /* from yellowknife.h from mpc107.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 9 "yellowknife.h" /* from mpc107.s */
 

 

 
 
 
#line 48
 
#line 154
  

 
 
 
 

 
 
 
 
#line 176
 

 
#line 197
 
#line 234
 
#line 241
 
 
#line 258
       
       
 
#line 266
 
#line 280
 
#line 290
       
#line 297
 

 
#line 318
 
#line 34 "dink_asm.h" /* from mpc107.s */
.set dink_msr,0x3930 



.set rtoc,2; 

.set r0,0; .set r1,1; .set r2,2; .set r3,3; 
.set r4,4; .set r5,5; .set r6,6; .set r7,7; 
.set r8,8; .set r9,9; .set r10,10; .set r11,11;
.set r12,12; .set r13,13; .set r14,14; .set r15,15; 
.set r16,16; .set r17,17; .set r18,18; .set r19,19; 
.set r20,20; .set r21,21; .set r22,22; .set r23,23;
.set r24,24; .set r25,25; .set r26,26; .set r27,27; 
.set r28,28; .set r29,29; .set r30,30; .set r31,31;

.set f0,0; .set f1,1; .set f2,2; .set f3,3; 
.set f4,4; .set f5,5; .set f6,6; .set f7,7; 
.set f8,8; .set f9,9; .set f10,10; .set f11,11;
.set f12,12; .set f13,13; .set f14,14; .set f15,15; 
.set f16,16; .set f17,17; .set f18,18; .set f19,19; 
.set f20,20; .set f21,21; .set f22,22; .set f23,23;
.set f24,24; .set f25,25; .set f26,26; .set f27,27; 
.set f28,28; .set f29,29; .set f30,30; .set f31,31;

.set v0,0; .set v1,1; .set v2,2; .set v3,3; 
.set v4,4; .set v5,5; .set v6,6; .set v7,7; 
.set v8,8; .set v9,9; .set v10,10; .set v11,11;
.set v12,12; .set v13,13; .set v14,14; .set v15,15; 
.set v16,16; .set v17,17; .set v18,18; .set v19,19; 
.set v20,20; .set v21,21; .set v22,22; .set v23,23;
.set v24,24; .set v25,25; .set v26,26; .set v27,27; 
.set v28,28; .set v29,29; .set v30,30; .set v31,31;

.set xer,1;  .set lr,8;  .set ctr,9;  .set dsisr,18; 
.set dar,19;  .set dec_r,22;  .set sdr1,25; .set srr0,26;
.set srr1,27; .set ear,282; .set pvr,287; 

.set sprg0,272; .set sprg1,273; 
.set sprg2,274; .set sprg3,275; 

.set cr2,2;

.set sr0,0; .set sr1,1; .set sr2,2; .set sr3,3; 
.set sr4,4; .set sr5,5; .set sr6,6; .set sr7,7; 
.set sr8,8; .set sr9,9; .set sr10,10;.set sr11,11;
.set sr12,12;.set sr13,13;.set sr14,14;.set sr15,15;



 
#line 94
 

.set dmiss,976; .set dcmp,977;
.set hash1,978; .set hash2,979;
.set imiss,980; .set icmp,981;
.set rpa,982;


 

 

 
#line 122
 
.set  mmcr1,956;
.set  pmc3,957; .set pmc4,958;
.set thrm1,1020; .set  thrm2,1021;
.set thrm3,1022; .set ictc,1019;
.set  l2cr,1017; .set upmc1,937;
.set upmc2,938; .set upmc3,941;
.set upmc4,942; .set usia,939;
.set ummcr0,936; .set ummcr1,940;

                                 


                                                                 


.set  vrsave,256; .set  ubamr, 935;
.set  ummcr2,928; .set  bamr, 951;
.set mmcr2,944; .set msscr1, 1015;
.set  msscr0,1014; 
.set dL1HWf,0x0080 
.set C_dL1HWf,0xff7f 
                                                                 


 

.set tbl,284; .set tbu,285;

.set ibat0u,528;  .set ibat0l,529; 
.set ibat1u,530; .set ibat1l,531;
.set ibat2u,532; .set ibat2l,533; 
.set ibat3u,534; .set ibat3l,535; 
.set dbat0u,536;  .set dbat0l,537; 
.set dbat1u,538; .set dbat1l,539;
.set dbat2u,540; .set dbat2l,541; 
.set dbat3u,542; .set dbat3l,543; 

.set mmcr0,952;
.set pmc1,953; .set pmc2,954;
.set sia,955; .set sda,959;

.set hid0,1008; .set hid1,1009; 
.set dabr,1013; .set iabr,1010;
.set pir,1023;

 

 

.set ibat4u,560;  .set ibat4l,561; 
.set ibat5u,562; .set ibat5l,563;
.set ibat6u,564; .set ibat6l,565; 
.set ibat7u,566; .set ibat7l,567; 
.set dbat4u,568;  .set dbat4l,569; 
.set dbat5u,570; .set dbat5l,571;
.set dbat6u,572; .set dbat6l,573; 
.set dbat7u,574; .set dbat7l,575; 
#line 40 "mpc107.s"
.extern config_addr
.extern config_data


 
        .text
        .align 2
 .global Mpc107Init
#line 69
Mpc107Init:

 

        or     r11, r3, r3


 
 
 
 
 

 addi r3, r0, 5 
 mtspr sprg0, r3

 addis r3,r0,0x8000   
 ori r3,r3,0x0004
    li      r4, 0x0006 

 stwbrx r3,0,r5
 sync
 sthbrx  r4, 0, r6
 sync

 addis r3,r0,0x8000   
 ori r3,r3,0x0006
 stwbrx r3,0,r5
 sync

 li      r3, 0x0002
 lhbrx   r4, r3, r6 
 sync
 ori     r4, r4, 0xffff 
 sthbrx  r4, r3, r6 
#line 114
 addis r3,r0,0x8000   
 ori r3,r3,0x00a8
 stwbrx r3,0,r5
 sync

 lwbrx r4,0,r6 

 lis r0,0x0011
 and r4,r4,r0 

 lis r0,     0xff00

 oris    r0, r0, 0x0004 


 ori     r0, r0, 0x1000 
 ori     r0, r0, 0x0800 

 ori     r0, r0, 0x0200 
   ori     r0, r0, 0x0080 

 ori     r0, r0, 0x0010 
 ori     r0, r0, 0x0008 


 or      r4, r4, r0 
 stwbrx  r4,0,r6
 sync
#line 147
 addis   r3,r0,0x8000   
 ori     r3,r3,0x00ac
 stwbrx  r3,0,r5
 sync

 

 lis     r0, 0x0000


 oris    r0, r0, 0x0400 


 oris    r0, r0, 0x0000 




 ori     r0, r0, 0x0000 




 stwbrx  r0,0,r6
#line 180
 addis  r3,r0,0x8000   
        ori    r3,r3,0x0078
        stwbrx r3,0,r5

        lis    r4,0xfc00 
        stwbrx r4,0,r6 
        sync
#line 194
 addis   r3,r0,0x8000   
        ori     r3,r3,0x00F0
        stwbrx  r3,0,r5
 sync

 lwbrx r7,0,r6 
 lis r0,0x0040 
 and r7,r7,r0 


 lis     r4, 0x0000 
 oris    r4, r4, 0x7580 
#line 217
    ori r4, r4, 0x0000 

        stwbrx  r4,0,r6
        sync
#line 226
 addis   r3,r0,0x8000   
 ori     r3,r3,0x00F4
 stwbrx  r3,0,r5
 sync

 lis     r4, 0x0000 

 oris    r4, r4, 0x0400 
 oris    r4, r4, 0x0040 
#line 246
 




 ori     r4, r4, 0x04cc 




 stwbrx  r4,0,r6
        sync
#line 263
 addis   r3,r0,0x8000   
 ori     r3,r3,0x00F8
 stwbrx  r3,0,r5
 sync

 lis     r4, 0x7000 
 oris    r4, r4, 0x0800 
 oris    r4, r4, 0x0040 




 stwbrx  r4,0,r6
 sync
#line 282
 addis   r3,r0,0x8000   
 ori     r3,r3,0x00FC
 stwbrx  r3,0,r5
 sync

 lis     r4, 0x3000 
 oris    r4, r4, 0x0500 


    oris    r4, r4, 0x0020 
 oris    r4, r4, 0x0010 
 oris    r4, r4, 0x0000 
 oris    r4, r4, 0x0002 


 ori     r4, r4, 0x3000 

    ori     r4, r4, 0x0200 
    ori     r4, r4, 0x0030 
    ori     r4, r4, 0x0009 




        cmpi 0,0,r7,0x0 
        beq c_is32bits
    ori     r4, r4, 0x0200 
 b mccr4set
c_is32bits:
    ori     r4, r4, 0x0300 

mccr4set:
 stwbrx  r4,0,r6
 sync
#line 328
 addis  r3,r0,0x8000   
 ori    r3,r3,0x0080
 stwbrx r3,0,r5

 addis  r4,r0,0x6040
 ori    r4,r4,0x2000
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x0084
 stwbrx r3,0,r5

 addis  r4,r0,0xe0c0
 ori    r4,r4,0xa080
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x0088
 stwbrx r3,0,r5

 addis  r4,r0,0x0000
 ori    r4,r4,0x0000
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x008c
 stwbrx r3,0,r5

 addis  r4,r0,0x0000
 ori    r4,r4,0x0000
 stwbrx r4,0,r6
#line 367
 addis  r3,r0,0x8000   
 ori    r3,r3,0x0090
 stwbrx r3,0,r5

 addis  r4,r0,0x7f5f
 ori    r4,r4,0x3f1f 
 
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x0094
 stwbrx r3,0,r5

 addis  r4,r0,0xffdf
 ori    r4,r4,0xbf9f
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x0098
 stwbrx r3,0,r5

 addis  r4,r0,0x0000
 ori    r4,r4,0x0000
 stwbrx r4,0,r6

 addis  r3,r0,0x8000   
 ori    r3,r3,0x009c
 stwbrx r3,0,r5

 addis  r4,r0,0x0000
 ori    r4,r4,0x0000
 stwbrx r4,0,r6
#line 405
 addis   r3,r0,0x8000   
 ori     r3,r3,0x73
 stwbrx  r3,0,r5
 sync

     lbz     r4, 3(r6) 
 
 li r4, 0

 ori r4, r4, 0x80 

 ori r4, r4, 0x40 




 ori r4, r4, 0x00 




 ori r4, r4, 0x00 




 ori r4, r4, 0x00 

 stb     r4, 3(r6) 
 sync
#line 440
 addis   r3, r0, 0x8000   
 ori     r3, r3, 0x74
 stwbrx  r3, 0, r5
 sync
#line 452
 li      r4, 0x8000 



 ori     r4, r4, 0x7c00 




 ori     r4, r4, 0x0000 
#line 467
    ori     r4, r4, 0x0001 

 sthbrx  r4, 0, r6
 sync
#line 476
 addis   r3,r0,0x8000   
 ori     r3,r3,0x76
 stwbrx  r3,0,r5
 sync

 li      r4, 0x00

    ori     r4, r4, 0x40 


 stb     r4, 2(r6) 
 sync
#line 495
 addis   r3,r0,0x8000   
 ori     r3,r3,0xa0
 stwbrx  r3,0,r5
 sync

 li r4,0x03 
     stb     r4, 0(r6)
#line 509
 addis   r3,r0,0x8000   
 ori     r3,r3,0xa3
 stwbrx  r3,0,r5
 sync

        li      r4, 0x0032 



 stb     r4, 3(r6) 
#line 524
 lis r4,0x0001
 mtctr   r4
Mpc107Wait200us:
 bdnz Mpc107Wait200us




 addis  r3,r0,0x8000   
 ori    r3,r3,0x00F0
 stwbrx r3,0,r5
 sync

 lwbrx  r4,0,r6 

 lis    r0, 0x0008 
 ori    r0, r0, 0x0000
 or     r4, r4, r0 
 stwbrx r4, 0, r6




 addis r4,r0,0x0002
 ori r4,r4,0xffff

 mtctr r4
Mpc107wait8ref:
 bdnz Mpc107wait8ref
#line 558
        addis  r3,r0,0x800F        
        ori    r3,r3,0xF018
        stwbrx r3,0,r5

        addis  r4,r0,0x0000
        ori    r4,r4,0x0180
        stwbrx r4,0,r6



        addis  r3,r0,0x800F        
        ori    r3,r3,0xF01C
        stwbrx r3,0,r5

        addis  r4,r0,0x0006 
        ori    r4,r4,0x0000
        stwbrx r4,0,r6



        addis  r3,r0,0x800F        
        ori    r3,r3,0xF020
        stwbrx r3,0,r5

        addis  r4,r0,0x0000
        ori    r4,r4,0x0180
        stwbrx r4,0,r6



        addis  r3,r0,0x800F        
        ori    r3,r3,0xF024
        stwbrx r3,0,r5

        addis  r4,r0,0xFFFF
        ori    r4,r4,0xFFFF
        stwbrx r4,0,r6



        addis  r3,r0,0x800F        
        ori    r3,r3,0xF048
        stwbrx r3,0,r5

        addis  r4,r0,0x0000
        ori    r4,r4,0x01C6
        stwbrx r4,0,r6


        addis  r4,r0,0x0100 
        ori    r4,r4,0x01C6
        stwbrx r4,0,r6

 sync
 eieio

        lis    r3, 0x0
 or     r3, r3, r11 

 blr