#line 67 "reg_swap.s"
.file "reg_swap.s"
#line 27 "config.h" /* from dink_asm.h from reg_swap.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 27
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 2 "yellowknife.h" /* from dink_asm.h from reg_swap.s */
 

 
#line 27 "config.h" /* from dink_asm.h from reg_swap.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 9 "yellowknife.h" /* from dink_asm.h from reg_swap.s */
 

 

 
 
 
#line 48
 
#line 154
  

 
 
 
 

 
 
 
 
#line 176
 

 
#line 197
 
#line 234
 
#line 241
 
 
#line 258
       
       
 
#line 266
 
#line 280
 
#line 290
       
#line 297
 

 
#line 318
 
#line 34 "dink_asm.h" /* from reg_swap.s */
.set dink_msr,0x3930 



.set rtoc,2; 

.set r0,0; .set r1,1; .set r2,2; .set r3,3; 
.set r4,4; .set r5,5; .set r6,6; .set r7,7; 
.set r8,8; .set r9,9; .set r10,10; .set r11,11;
.set r12,12; .set r13,13; .set r14,14; .set r15,15; 
.set r16,16; .set r17,17; .set r18,18; .set r19,19; 
.set r20,20; .set r21,21; .set r22,22; .set r23,23;
.set r24,24; .set r25,25; .set r26,26; .set r27,27; 
.set r28,28; .set r29,29; .set r30,30; .set r31,31;

.set f0,0; .set f1,1; .set f2,2; .set f3,3; 
.set f4,4; .set f5,5; .set f6,6; .set f7,7; 
.set f8,8; .set f9,9; .set f10,10; .set f11,11;
.set f12,12; .set f13,13; .set f14,14; .set f15,15; 
.set f16,16; .set f17,17; .set f18,18; .set f19,19; 
.set f20,20; .set f21,21; .set f22,22; .set f23,23;
.set f24,24; .set f25,25; .set f26,26; .set f27,27; 
.set f28,28; .set f29,29; .set f30,30; .set f31,31;

.set v0,0; .set v1,1; .set v2,2; .set v3,3; 
.set v4,4; .set v5,5; .set v6,6; .set v7,7; 
.set v8,8; .set v9,9; .set v10,10; .set v11,11;
.set v12,12; .set v13,13; .set v14,14; .set v15,15; 
.set v16,16; .set v17,17; .set v18,18; .set v19,19; 
.set v20,20; .set v21,21; .set v22,22; .set v23,23;
.set v24,24; .set v25,25; .set v26,26; .set v27,27; 
.set v28,28; .set v29,29; .set v30,30; .set v31,31;

.set xer,1;  .set lr,8;  .set ctr,9;  .set dsisr,18; 
.set dar,19;  .set dec_r,22;  .set sdr1,25; .set srr0,26;
.set srr1,27; .set ear,282; .set pvr,287; 

.set sprg0,272; .set sprg1,273; 
.set sprg2,274; .set sprg3,275; 

.set cr2,2;

.set sr0,0; .set sr1,1; .set sr2,2; .set sr3,3; 
.set sr4,4; .set sr5,5; .set sr6,6; .set sr7,7; 
.set sr8,8; .set sr9,9; .set sr10,10;.set sr11,11;
.set sr12,12;.set sr13,13;.set sr14,14;.set sr15,15;



 
#line 94
 

.set dmiss,976; .set dcmp,977;
.set hash1,978; .set hash2,979;
.set imiss,980; .set icmp,981;
.set rpa,982;


 

 

 
#line 122
 
.set  mmcr1,956;
.set  pmc3,957; .set pmc4,958;
.set thrm1,1020; .set  thrm2,1021;
.set thrm3,1022; .set ictc,1019;
.set  l2cr,1017; .set upmc1,937;
.set upmc2,938; .set upmc3,941;
.set upmc4,942; .set usia,939;
.set ummcr0,936; .set ummcr1,940;

                                 


                                                                 


.set  vrsave,256; .set  ubamr, 935;
.set  ummcr2,928; .set  bamr, 951;
.set mmcr2,944; .set msscr1, 1015;
.set  msscr0,1014; 
.set dL1HWf,0x0080 
.set C_dL1HWf,0xff7f 
                                                                 


 

.set tbl,284; .set tbu,285;

.set ibat0u,528;  .set ibat0l,529; 
.set ibat1u,530; .set ibat1l,531;
.set ibat2u,532; .set ibat2l,533; 
.set ibat3u,534; .set ibat3l,535; 
.set dbat0u,536;  .set dbat0l,537; 
.set dbat1u,538; .set dbat1l,539;
.set dbat2u,540; .set dbat2l,541; 
.set dbat3u,542; .set dbat3l,543; 

.set mmcr0,952;
.set pmc1,953; .set pmc2,954;
.set sia,955; .set sda,959;

.set hid0,1008; .set hid1,1009; 
.set dabr,1013; .set iabr,1010;
.set pir,1023;

 

 

.set ibat4u,560;  .set ibat4l,561; 
.set ibat5u,562; .set ibat5l,563;
.set ibat6u,564; .set ibat6l,565; 
.set ibat7u,566; .set ibat7l,567; 
.set dbat4u,568;  .set dbat4l,569; 
.set dbat5u,570; .set dbat5l,571;
.set dbat6u,572; .set dbat6l,573; 
.set dbat7u,574; .set dbat7l,575; 
#line 27 "config.h" /* from dink_asm.h from reg_swap.s */
 




 

 


 
#line 46
 
#line 100
 

 
#line 157
 
#line 75 "reg_swap.s"
.extern general_register_file
.extern floating_register_file
.extern vector_register_file
.extern vector_register_memory
.extern special_register_file
.extern temp_sprg0
.extern temp_sprg1
.extern temp_gpr2
.extern process_type
.extern config_addr
.extern config_data
 
  .data
  .align 2
  .global linkreg
linkreg: .long  0

  .align 2
  .global offset
offset:  .long 0

                .align 8 
temp_fpscr: .double 0

                .align 4 
temp_vscr_blank:
  .skip 12

temp_vscr: .double 0


.set user_offset,0
.set dink_offset,1
.set gpr_inc,8 
.set fpr_inc,16 
.set vr_inc,32 
.set spr_inc,8 

 
.text
.align 4
.global return_msr
return_msr: 
 mfmsr r3
 blr

.global return_hid0
return_hid0: 
 mfspr r3,hid0
 blr

.global return_dbat2l
return_dbat2l: 
 mfspr r3,541
 blr

.global return_dbat2u
return_dbat2u: 
 mfspr r3,540
 blr




.text
.align 4

.global save_to_dink

save_to_dink: 
 
 lis r3,linkreg@h 
 ori r3,r3,linkreg@l
 mflr r4
 stw r4,0(r3)

 addis r4,0,0
 ori r4,r4,dink_offset*4 
 
 
 
 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3) 
 bl save_gprs

 addis r4,0,0
 ori r4,r4,dink_offset*8 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3) 
 bl save_fprs

 addis r4,0,0 
 ori r4,r4,dink_offset*16 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3) 
 bl save_vrs

 addis r4,0,0
 ori r4,r4,dink_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3) 
 bl save_sprs
 
 lis r3,linkreg@h 
 ori  r3,r3,linkreg@l

 lwz r3,0(r3)
 mtlr r3 
 
 blr




.text
.align 2
.global save_to_user

save_to_user: 
 
 lis r3,linkreg@h 
 ori r3,r3,linkreg@l

 mfspr r4,0x08 
 stw r4,0(r3) 

 
 addis r4,0,0
 ori r4,r4,user_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl save_gprs

 lis r3,current_r3@h
 ori r3,r3,current_r3@l
 lwz r4,0(r3)
 lis r3,general_register_file@h
 ori r3,r3,general_register_file@l
 stw     r4,3*gpr_inc(r3) 


 lis r3,current_r4@h
 ori r3,r3,current_r4@l
 lwz r4,0(r3)
 lis r3,general_register_file@h
 ori r3,r3,general_register_file@l
 stw     r4,4*gpr_inc(r3) 
 
 lis r3,current_r5@h
 ori r3,r3,current_r5@l
 lwz r4,0(r3)
 lis r3,general_register_file@h
 ori r3,r3,general_register_file@l
 stw     r4,5*gpr_inc(r3) 
 
 

 
 addis r4,0,0
 ori r4,r4,user_offset*8 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl save_fprs

 
 addis r4,0,0
 ori r4,r4,user_offset*16 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl save_vrs

 
 addis r4,0,0
 ori r4,r4,user_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl save_sprs



 

 lis r3,current_msr@h
 ori r3,r3,current_msr@l
 lwz r4,0(r3)
 lis r3,special_register_file@h
 ori r3,r3,special_register_file@l
 stw r4,79     *spr_inc(r3)

 lis r3,current_hid0@h
 ori r3,r3,current_hid0@l
 lwz r4,0(r3)
 lis r3,special_register_file@h
 ori r3,r3,special_register_file@l
 stw r4,67      *spr_inc(r3)

 lis     r3,current_lr@h
        ori     r3,r3,current_lr@l
        lwz     r4,0(r3)
        lis     r3,special_register_file@h
        ori     r3,r3,special_register_file@l
        stw     r4,4     *spr_inc(r3)

 lis     r3,current_cr@h
        ori     r3,r3,current_cr@l
        lwz     r4,0(r3)
        lis     r3,special_register_file@h
        ori     r3,r3,special_register_file@l
        stw     r4,77    *spr_inc(r3)

 


 lis r3,linkreg@h 
 ori r3,r3,linkreg@l 
 lwz r3,0(r3)
 mtspr lr,r3
 
 blr



 
.text
.align 2
.global restore_to_dink

restore_to_dink: 

 lis r3,linkreg@h 
 ori r3,r3,linkreg@l 
 
 mfspr r4,lr
 stw r4,0(r3)
 
 addis r4,0,0 
 ori r4,r4,dink_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_sprs

 addis r4,0,0
 ori r4,r4,dink_offset*8 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_fprs

 addis r4,0,0
 ori r4,r4,dink_offset*16 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_vrs

 addis r4,0,0
 ori r4,r4,dink_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_gprs
 
 lis r3,linkreg@h 
 ori r3,r3,linkreg@l

 lwz r3,0(r3)
 mtspr lr,r3
 
 blr




.text
.align 2
.global restore_to_user

restore_to_user: 

 lis r3,linkreg@h 
 ori r3,r3,linkreg@l
 
 mfspr r4,lr
 stw r4,0(r3)

 addis r4,0,0
 ori r4,r4,user_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_sprs

 addis r4,0,0
 ori r4,r4,user_offset*8 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_fprs

 addis r4,0,0
 ori r4,r4,user_offset*16 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_vrs

 addis r4,0,0
 ori r4,r4,user_offset*4 
 lis r3,offset@h
 ori r3,r3,offset@l
 stw r4,0(r3)
 bl restore_gprs
 
 
 
 

 lis r3,linkreg@h 
 ori r3,r3,linkreg@l
 lwz r3,0(r3)
 mtspr lr,r3
 
 lis     r3,special_register_file@h 
        ori     r3,r3,special_register_file@l 

       lwz     r1,77    *spr_inc(r3) 
        mtcrf   255,r1 
 
 
 
 

 
 blr
 


.text
.align 2
.global save_sprs

save_sprs: 


 
 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)
 
 lis r3,special_register_file@h
 ori r3,r3,special_register_file@l

 add r3,r3,r4 
 
#line 444
 mfspr r4,xer 
 stw r4,1      *spr_inc(r3) 
 mfspr r4,lr 
 stw r4,4     *spr_inc(r3)
 mfspr r4,ctr 
 stw r4,5      *spr_inc(r3)
 mfspr r4,dsisr 
 stw r4,6        *spr_inc(r3)
 mfspr r4,dar 
 stw r4,7      *spr_inc(r3)


 lis r4,in_which_code@h
 ori r4,r4,in_which_code@l
 lwz r4,0(r4)
 cmpi 0,0,r4,0x0
 beq cr0,noDecSave
 mfspr r4,dec_r 
 stw r4,8      *spr_inc(r3)
noDecSave:

 mfspr r4,sdr1 
 stw r4,9       *spr_inc(r3)
 mfspr r4,srr0 
 stw r4,10      *spr_inc(r3)
 mfspr r4,srr1 
 stw r4,11      *spr_inc(r3)
 lis r4,temp_sprg0@h 
 ori r4,r4,temp_sprg0@l
 lwzx r5,0,r4
 stw r5,12       *spr_inc(r3)
 lis r4,temp_sprg1@h 
 ori r4,r4,temp_sprg1@l
 lwzx r5,0,r4
 stw r5,13       *spr_inc(r3)



 mfspr r4,ear 
 stw r4,17     *spr_inc(r3)
 sync
 
 mfspr r4,pvr 
 stw r4,20     *spr_inc(r3) 

 sync
 


 mfcr r4 
 stw r4,77    *spr_inc(r3)

 sync
 
        mffs    f1 
        lis     r5,temp_fpscr@h
 ori r5,r5,temp_fpscr@l

 
        lwz     r4,4(r5) 
        stw     r4,78       *spr_inc(r3)

 mfmsr r4 
 stw r4,79     *spr_inc(r3)
 mfsr r4,sr0 
 stw r4,80     *spr_inc(r3)
 mfsr r4,sr1 
 stw r4,81     *spr_inc(r3)
 mfsr r4,sr2 
 stw r4,82     *spr_inc(r3)
 mfsr r4,sr3 
 stw r4,83     *spr_inc(r3)
 mfsr r4,sr4 
 stw r4,84     *spr_inc(r3)
 mfsr r4,sr5 
 stw r4,85     *spr_inc(r3)
 mfsr r4,sr6 
 stw r4,86     *spr_inc(r3)
 mfsr r4,sr7 
 stw r4,87     *spr_inc(r3)
 mfsr r4,sr8 
 stw r4,88     *spr_inc(r3)
 mfsr r4,sr9 
 stw r4,89     *spr_inc(r3)
 mfsr r4,sr10 
 stw r4,90      *spr_inc(r3)
 mfsr r4,sr11 
 stw r4,91      *spr_inc(r3)
 mfsr r4,sr12 
 stw r4,92      *spr_inc(r3)
 mfsr r4,sr13 
 stw r4,93      *spr_inc(r3)
 mfsr r4,sr14 
 stw r4,94      *spr_inc(r3)
 mfsr r4,sr15 
 stw r4,95      *spr_inc(r3)

 mftb r4 
 stw r4,18     *spr_inc(r3)
 mftbu r4 
 stw r4,19     *spr_inc(r3)

 mfspr r4,528 
 stw r4,23        *spr_inc(r3)
 mfspr r4,529 
 stw r4,24        *spr_inc(r3)
 mfspr r4,530 
 stw r4,27        *spr_inc(r3)
 mfspr r4,531 
 stw r4,28        *spr_inc(r3)
 mfspr r4,532 
 stw r4,31        *spr_inc(r3)
 mfspr r4,533 
 stw r4,32        *spr_inc(r3)
 mfspr r4,534 
 stw r4,35        *spr_inc(r3)
 mfspr r4,535 
 stw r4,36        *spr_inc(r3)

 mfspr r4,536 
 stw r4,37        *spr_inc(r3)
 mfspr r4,537 
 stw r4,38        *spr_inc(r3)
 mfspr r4,538 
 stw r4,39        *spr_inc(r3)
 mfspr r4,539 
 stw r4,40        *spr_inc(r3)
 mfspr r4,540 
 stw r4,41        *spr_inc(r3)
 mfspr r4,541 
 stw r4,42        *spr_inc(r3)
 mfspr r4,542 
 stw r4,43        *spr_inc(r3)
 mfspr r4,543 
 stw r4,44        *spr_inc(r3)



 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x33
 bne     set_PPC604

 
 
 
 addis r6,0,0xFFFF 
 ori r6,r6,0xFFCF
 mfmsr r5
 and r5,r5,r6
 mtmsr r5
 sync

 mfspr r7,dmiss 
 mfspr r8,dcmp 
 mfspr r9,hash1 
 mfspr r10,hash2 
 mfspr r11,imiss 
 mfspr r12,icmp 
 mfspr r13,rpa 
 sync

 ori r5,r5,0x0030
 mtmsr r5 
 sync

 stw r7,60       *spr_inc(r3)
 stw r8,61      *spr_inc(r3)
 stw r9,62       *spr_inc(r3)
 stw r10,63       *spr_inc(r3)
 stw r11,64       *spr_inc(r3)
 stw r12,65      *spr_inc(r3)
 stw r13,66     *spr_inc(r3)
 
 mfspr r4,hid0 
 stw r4,67      *spr_inc(r3)
 mfspr r4,hid1 
 stw r4,68      *spr_inc(r3)
 mfspr r4,iabr 
 stw r4,69      *spr_inc(r3)
 b end_setting

 

 

set_PPC604:
 
 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x34
 bne     set_PPCART

 mfspr r4,mmcr0 
 stw r4,52       *spr_inc(r3)
 mfspr r4,pmc1 
 stw r4,53      *spr_inc(r3)
 mfspr r4,pmc2 
 stw r4,54      *spr_inc(r3)
 mfspr r4,sia 
 stw r4,55     *spr_inc(r3)
 mfspr r4,sda 
 stw r4,59     *spr_inc(r3)

 mfspr r4,hid0 
 stw r4,67      *spr_inc(r3)
 mfspr r4,hid1 
 stw r4,68      *spr_inc(r3)
 mfspr r4,dabr 
 stw r4,70      *spr_inc(r3)
 mfspr r4,iabr 
 stw r4,69      *spr_inc(r3)
 mfspr r4,pir 
 stw r4,76     *spr_inc(r3)
 b end_setting

 

 

set_PPCART:
 
 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x35 
 beq     set_PPCARTnow
 cmpi    0,0,r6, 0x37 
 bne     set_PPCMAX

set_PPCARTnow:
 mfspr r4,hid0 
 stw r4,67      *spr_inc(r3)
 mfspr r4,hid1 
 stw r4,68      *spr_inc(r3)
 mfspr r4,iabr 
 stw r4,69      *spr_inc(r3)
 mfspr r4,dabr 
 stw r4,70      *spr_inc(r3)
 mfspr r4,mmcr0 
 stw r4,52       *spr_inc(r3)
 mfspr r4,mmcr1 
 stw r4,56       *spr_inc(r3)
 mfspr r4,pmc1 
 stw r4,53      *spr_inc(r3)
 mfspr r4,pmc2 
 stw r4,54      *spr_inc(r3)
 mfspr r4,pmc3 
 stw r4,57      *spr_inc(r3)
 mfspr r4,pmc4 
 stw r4,58      *spr_inc(r3)
 mfspr r4,sia 
 stw r4,55     *spr_inc(r3)
 mfspr r4,thrm1 
 stw r4,73       *spr_inc(r3)
 mfspr r4,thrm2 
 stw r4,74       *spr_inc(r3)
 mfspr r4,thrm3 
 stw r4,75       *spr_inc(r3)
 mfspr r4,ictc 
 stw r4,72      *spr_inc(r3)
 mfspr r4,l2cr 
 stw r4,71      *spr_inc(r3)
 mfspr r4,upmc1 
 stw r4,46       *spr_inc(r3)
 mfspr r4,upmc2 
 stw r4,47       *spr_inc(r3)
 mfspr r4,upmc3 
 stw r4,50       *spr_inc(r3)
 mfspr r4,upmc4 
 stw r4,51       *spr_inc(r3)
 mfspr r4,usia 
 stw r4,48      *spr_inc(r3)
 mfspr r4,ummcr0 
 stw r4,45        *spr_inc(r3)
 mfspr r4,ummcr1 
 stw r4,49        *spr_inc(r3)




 cmpi    0,0,r6, 0x37 
 bne end_setting

 mfspr r4,1011 
 stw r4,105     *spr_inc(r3)
 mfspr r4,1016 
 stw r4,106     *spr_inc(r3)

 mfspr r4,560 
 stw r4,115       *spr_inc(r3)
 mfspr r4,561 
 stw r4,116       *spr_inc(r3)
 mfspr r4,562 
 stw r4,117       *spr_inc(r3)
 mfspr r4,563 
 stw r4,118       *spr_inc(r3)
 mfspr r4,564 
 stw r4,119       *spr_inc(r3)
 mfspr r4,565 
 stw r4,120       *spr_inc(r3)
 mfspr r4,566 
 stw r4,121       *spr_inc(r3)
 mfspr r4,567 
 stw r4,122       *spr_inc(r3)

 mfspr r4,568 
 stw r4,107       *spr_inc(r3)
 mfspr r4,569 
 stw r4,108       *spr_inc(r3)
 mfspr r4,570 
 stw r4,109       *spr_inc(r3)
 mfspr r4,571 
 stw r4,110       *spr_inc(r3)
 mfspr r4,572 
 stw r4,111       *spr_inc(r3)
 mfspr r4,573 
 stw r4,112       *spr_inc(r3)
 mfspr r4,574 
 stw r4,113       *spr_inc(r3)
 mfspr r4,575 
 stw r4,114       *spr_inc(r3)

 b end_setting




set_PPCMAX:
 
 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6,0x36
 bne     end_setting

 mfmsr r5 
 oris r5,r5,0x0200 
 mtmsr r5 
 sync

 .long 0x10200604 
 lis  r5,temp_vscr_blank@h 
 ori r5,r5,temp_vscr_blank@l
 .long 0x7c2029ce 

 lwz r4,12(r5) 
 
 stw r4,104     *spr_inc(r3) 

 mfspr r4,hid0 
 stw r4,67      *spr_inc(r3)
 mfspr r4,hid1 
 stw r4,68      *spr_inc(r3)
 mfspr r4,iabr 
 stw r4,69      *spr_inc(r3)
 mfspr r4,dabr 
 stw r4,70      *spr_inc(r3)
 mfspr r4,mmcr0 
 stw r4,52       *spr_inc(r3)
 mfspr r4,mmcr1 
 stw r4,56       *spr_inc(r3)
 mfspr r4,pmc1 
 stw r4,53      *spr_inc(r3)
 mfspr r4,pmc2 
 stw r4,54      *spr_inc(r3)
 mfspr r4,pmc3 
 stw r4,57      *spr_inc(r3)
 mfspr r4,pmc4 
 stw r4,58      *spr_inc(r3)
 mfspr r4,sia 
 stw r4,55     *spr_inc(r3)
 mfspr r4,thrm1 
 stw r4,73       *spr_inc(r3)
 mfspr r4,thrm2 
 stw r4,74       *spr_inc(r3)
 mfspr r4,thrm3 
 stw r4,75       *spr_inc(r3)
 mfspr r4,ictc 
 stw r4,72      *spr_inc(r3)
 mfspr r4,l2cr 
 stw r4,71      *spr_inc(r3)
 mfspr r4,upmc1 
 stw r4,46       *spr_inc(r3)
 mfspr r4,upmc2 
 stw r4,47       *spr_inc(r3)
 mfspr r4,upmc3 
 stw r4,50       *spr_inc(r3)
 mfspr r4,upmc4 
 stw r4,51       *spr_inc(r3)
 mfspr r4,usia 
 stw r4,48      *spr_inc(r3)
 mfspr r4,ummcr0 
 stw r4,45        *spr_inc(r3)
 mfspr r4,ummcr1 
 stw r4,49        *spr_inc(r3)

 mfspr r4,pir 
 stw r4,98     *spr_inc(r3)
 mfspr r4,vrsave 
 stw r4,99        *spr_inc(r3)
 mfspr r4,mmcr2 
 stw r4,100      *spr_inc(r3)
 mfspr r4,bamr 
 stw r4,101     *spr_inc(r3)
 mfspr r4,msscr0 
 stw r4,96        *spr_inc(r3)
 mfspr r4,msscr1 
 stw r4,97        *spr_inc(r3)
 mfspr r4,ummcr2 
 stw r4,103       *spr_inc(r3)
 mfspr r4,ubamr 
 stw r4,102      *spr_inc(r3)


end_setting:


 blr 



.text
.align 2
.global save_fprs

save_fprs: 
 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,floating_register_file@h
 ori r3,r3,floating_register_file@l

 add r3,r3,r4 
 stfd f0,0*fpr_inc(r3) 
 stfd f1,1*fpr_inc(r3) 
 stfd f2,2*fpr_inc(r3)
 stfd f3,3*fpr_inc(r3)
 stfd f4,4*fpr_inc(r3)
 stfd f5,5*fpr_inc(r3)
 stfd f6,6*fpr_inc(r3)
 stfd f7,7*fpr_inc(r3)
 stfd f8,8*fpr_inc(r3)
 stfd f9,9*fpr_inc(r3)
 stfd f10,10*fpr_inc(r3)
 stfd f11,11*fpr_inc(r3)
 stfd f12,12*fpr_inc(r3)
 stfd f13,13*fpr_inc(r3)
 stfd f14,14*fpr_inc(r3)
 stfd f15,15*fpr_inc(r3)
 stfd f16,16*fpr_inc(r3)
 stfd f17,17*fpr_inc(r3)
 stfd f18,18*fpr_inc(r3)
 stfd f19,19*fpr_inc(r3)
 stfd f20,20*fpr_inc(r3)
 stfd f21,21*fpr_inc(r3)
 stfd f22,22*fpr_inc(r3)
 stfd f23,23*fpr_inc(r3)
 stfd f24,24*fpr_inc(r3)
 stfd f25,25*fpr_inc(r3)
 stfd f26,26*fpr_inc(r3)
 stfd f27,27*fpr_inc(r3)
 stfd f28,28*fpr_inc(r3)
 stfd f29,29*fpr_inc(r3)
 stfd f30,30*fpr_inc(r3)
 stfd f31,31*fpr_inc(r3)

 blr 



.text
.align 4
.global save_vrs

save_vrs: 


 lis r4,process_type@h 
 ori r4,r4,process_type@l 
 lbz     r3, 0(r4)
 cmpi    0,0,r3,0x36
 bne     no_altivec
 
 mfmsr r3 
 oris r4,r3,0x0200 
 mtmsr r4

 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,vector_register_memory@h
 ori r3,r3,vector_register_memory@l

 add r3,r3,r4 
 li  r4,0

        .long 0x7c0321ce 
        addi    r4,r4,vr_inc
        .long 0x7c2321ce 
        addi    r4,r4,vr_inc
        .long 0x7c4321ce 
        addi    r4,r4,vr_inc
        .long 0x7c6321ce 
        addi    r4,r4,vr_inc
        .long 0x7c8321ce 
        addi    r4,r4,vr_inc
        .long 0x7ca321ce 
        addi    r4,r4,vr_inc
        .long 0x7cc321ce 
        addi    r4,r4,vr_inc
        .long 0x7ce321ce 
        addi    r4,r4,vr_inc
        .long 0x7d0321ce 
        addi    r4,r4,vr_inc 
 .long 0x7d2321ce 
        addi    r4,r4,vr_inc
        .long 0x7d4321ce 
        addi    r4,r4,vr_inc
        .long 0x7d6321ce 
        addi    r4,r4,vr_inc
        .long 0x7d8321ce 
        addi    r4,r4,vr_inc
        .long 0x7da321ce 
        addi    r4,r4,vr_inc
        .long 0x7dc321ce 
        addi    r4,r4,vr_inc
        .long 0x7de321ce 
        addi    r4,r4,vr_inc
        .long 0x7e0321ce 
        addi    r4,r4,vr_inc
        .long 0x7e2321ce 
        addi    r4,r4,vr_inc
        .long 0x7e4321ce 
        addi    r4,r4,vr_inc
        .long 0x7e6321ce 
        addi    r4,r4,vr_inc 
      .long 0x7e8321ce 
        addi    r4,r4,vr_inc
        .long 0x7ea321ce 
        addi    r4,r4,vr_inc
        .long 0x7ec321ce 
        addi    r4,r4,vr_inc
        .long 0x7ee321ce 
        addi    r4,r4,vr_inc
        .long 0x7f0321ce 
        addi    r4,r4,vr_inc
        .long 0x7f2321ce 
        addi    r4,r4,vr_inc
        .long 0x7f4321ce 
        addi    r4,r4,vr_inc
        .long 0x7f6321ce 
        addi    r4,r4,vr_inc
        .long 0x7f8321ce 
        addi    r4,r4,vr_inc
        .long 0x7fa321ce 
        addi    r4,r4,vr_inc
        .long 0x7fc321ce 
        addi    r4,r4,vr_inc 
        .long 0x7fe321ce 
 
no_altivec:

 blr 



.text
.align 2
.global save_gprs

save_gprs: 

 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,general_register_file@h
 ori r3,r3,general_register_file@l
 add r3,r3,r4 
 stw r0,0*gpr_inc(r3) 
 stw r1,1*gpr_inc(r3) 
 stw r2,2*gpr_inc(r3) 
 stw r5,5*gpr_inc(r3)
 stw r6,6*gpr_inc(r3)
 stw r7,7*gpr_inc(r3)
 stw r8,8*gpr_inc(r3)
 stw r9,9*gpr_inc(r3)
 stw r10,10*gpr_inc(r3)
 stw r11,11*gpr_inc(r3)
 stw r12,12*gpr_inc(r3)
 stw r13,13*gpr_inc(r3)
 stw r14,14*gpr_inc(r3)
 stw r15,15*gpr_inc(r3)
 stw r16,16*gpr_inc(r3)
 stw r17,17*gpr_inc(r3)
 stw r18,18*gpr_inc(r3)
 stw r19,19*gpr_inc(r3)
 stw r20,20*gpr_inc(r3)
 stw r21,21*gpr_inc(r3)
 stw r22,22*gpr_inc(r3)
 stw r23,23*gpr_inc(r3)
 stw r24,24*gpr_inc(r3)
 stw r25,25*gpr_inc(r3)
 stw r26,26*gpr_inc(r3)
 stw r27,27*gpr_inc(r3)
 stw r28,28*gpr_inc(r3)
 stw r29,29*gpr_inc(r3)
 stw r30,30*gpr_inc(r3)
 stw r31,31*gpr_inc(r3)

 blr 
 




.text
.align 2
.global restore_sprs

restore_sprs: 


 
 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,special_register_file@h 
 ori r3,r3,special_register_file@l

 add r3,r3,r4 
#line 1087
 

 


 

 lwz r4,67      *spr_inc(r3) 

 lis r15,0
 ori r15,r15,0xcc00
 and r15,r4,r15
 cmpw 0,r15
 beq user_cache_off


 lis r15,0x0000
 ori r15,r15,0x0c00 
 or r4,r4,r15 
 mtspr hid0,r4

 lis r15,0xffff
 ori r15,r15,0xf3ff 
 and r4,r4,r15 
 mtspr hid0,r4

 sync

user_cache_off:

 

 lwz r4,1      *spr_inc(r3) 
 mtspr xer,r4
 lwz r4,4     *spr_inc(r3) 
 mtspr sprg0,r4
 lwz r4,5      *spr_inc(r3) 
 mtspr ctr,r4
 lwz r4,6        *spr_inc(r3) 
 mtspr dsisr,r4
 lwz r4,7      *spr_inc(r3) 
 mtspr dar,r4


 lis r4,in_which_code@h
 ori r4,r4,in_which_code@l
 lwz r4,0(r4)
 cmpi 0,0,r4,0x0
 beq cr0,noDecRestore
 lwz r4,8      *spr_inc(r3) 
 mtspr dec_r,r4
noDecRestore:

 lwz r4,9       *spr_inc(r3) 
 mtspr sdr1,r4
 lwz r4,10      *spr_inc(r3) 
 mtspr srr0,r4
 lwz r4,11      *spr_inc(r3) 
 mtspr srr1,r4
 sync

 

 lis r4,temp_sprg0@h 
 ori r4,r4,temp_sprg0@l 
 lwz r15,12       *spr_inc(r3)
 stwx r15,0,r4

 lis r4,temp_sprg1@h 
 ori r4,r4,temp_sprg1@l
 lwz r15,13       *spr_inc(r3)
 stwx r15,0,r4


 
 lwz r4,17     *spr_inc(r3) 
 mtspr ear,r4 



 lwz r4,77    *spr_inc(r3) 
 mtcrf 255,r4 
 

        lwz     r4,78       *spr_inc(r3) 
        lis     r5,temp_fpscr@h
        ori r5,r5,temp_fpscr@l
 
 stw     r4,4(r5) 
        lfd     f1,0(r5) 
        mtfsf   255,f1
 

 

 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x33
 bne     set_PPC604_regs

 
 
 
 lwz r7,60       *spr_inc(r3) 
 lwz r8,61      *spr_inc(r3) 
 lwz r9,64       *spr_inc(r3) 
 lwz r10,65      *spr_inc(r3) 
 lwz r11,66     *spr_inc(r3) 

 addis r6,0,0xFFFF 
 ori r6,r6,0xFFCF
 mfmsr r5
 and r5,r5,r6
 mtmsr r5
 isync
 sync

 mtspr dmiss,r7 
 mtspr dcmp,r8 
 mtspr imiss,r9 
 mtspr icmp,r10 
 mtspr rpa,r11
 sync

 ori r5,r5,0x0030 
 mtmsr r5
 isync
 sync




 lwz r4,69      *spr_inc(r3) 
 mtspr iabr,r4
 b  end_set_regs



set_PPC604_regs:
 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x34
 bne     set_PPCART_regs


 lwz r4,52       *spr_inc(r3) 
 mtspr mmcr0,r4
 lwz r4,53      *spr_inc(r3) 
 mtspr pmc1,r4
 lwz r4,54      *spr_inc(r3) 
 mtspr pmc2,r4
 lwz r4,55     *spr_inc(r3) 
 mtspr sia,r4
 lwz r4,59     *spr_inc(r3) 
 mtspr sda,r4

 lwz r4,67      *spr_inc(r3) 
 mtspr hid0,r4



 lwz r4,70      *spr_inc(r3) 
 mtspr dabr,r4
 lwz r4,69      *spr_inc(r3) 
 mtspr iabr,r4
 lwz r4,76     *spr_inc(r3) 
 mtspr pir,r4
 b end_set_regs




set_PPCART_regs:

 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6, 0x35 
 beq     set_PPCART_regs_now
 cmpi    0,0,r6, 0x37 
 bne     set_PPCMAX_regs



set_PPCART_regs_now:
 lwz r4,67      *spr_inc(r3)
 mtspr hid0,r4 
 lwz r4,68      *spr_inc(r3)
 mtspr hid1,r4 
  lwz r4,69      *spr_inc(r3)
 mtspr iabr,r4 
  lwz r4,70      *spr_inc(r3)
 mtspr dabr,r4 
 lwz r4,52       *spr_inc(r3)
 mtspr mmcr0,r4 
 lwz r4,56       *spr_inc(r3)
 mtspr mmcr1,r4 
 lwz r4,53      *spr_inc(r3)
 mtspr pmc1,r4 
 lwz r4,54      *spr_inc(r3)
 mtspr pmc2,r4 
 lwz r4,57      *spr_inc(r3)
 mtspr pmc3,r4 
 lwz r4,58      *spr_inc(r3)
 mtspr pmc4,r4 
 lwz r4,55     *spr_inc(r3)
 mtspr sia,r4 
 lwz r4,73       *spr_inc(r3)
 mtspr thrm1,r4 
 lwz r4,74       *spr_inc(r3)
 mtspr thrm2,r4 
 lwz r4,75       *spr_inc(r3)
 mtspr thrm3,r4 
 lwz r4,72      *spr_inc(r3)
 mtspr ictc,r4 
 lwz r4,71      *spr_inc(r3)
 mtspr l2cr,r4 
#line 1326
 cmpi    0,0,r6, 0x37 
 bne end_set_regs

 lwz r4,105     *spr_inc(r3)
 mtspr 1011,r4 
 lwz r4,106     *spr_inc(r3)
 mtspr 1016,r4 

 mtspr 560,r4 
 lwz r4,115       *spr_inc(r3)
 mtspr 561,r4 
 lwz r4,116       *spr_inc(r3)
 mtspr 562,r4 
 lwz r4,117       *spr_inc(r3)
 mtspr 563,r4 
 lwz r4,118       *spr_inc(r3)
 mtspr 564,r4 
 lwz r4,119       *spr_inc(r3)
 mtspr 565,r4 
 lwz r4,120       *spr_inc(r3)
 mtspr 566,r4 
 lwz r4,121       *spr_inc(r3)
 mtspr 567,r4 
 lwz r4,122       *spr_inc(r3)

 mtspr 568,r4 
 lwz r4,107       *spr_inc(r3)
 mtspr 569,r4 
 lwz r4,108       *spr_inc(r3)
 mtspr 570,r4 
 lwz r4,109       *spr_inc(r3)
 mtspr 571,r4 
 lwz r4,110       *spr_inc(r3)
 mtspr 572,r4 
 lwz r4,111       *spr_inc(r3)
 mtspr 573,r4 
 lwz r4,112       *spr_inc(r3)
 mtspr 574,r4 
 lwz r4,113       *spr_inc(r3)
 mtspr 575,r4 
 lwz r4,114       *spr_inc(r3)

 b end_set_regs


set_PPCMAX_regs:

 lis r4,process_type@h
 ori r4,r4,process_type@l
 lbz     r6, 0(r4)
 cmpi    0,0,r6,0x36
 bne     end_set_regs

 lwz  r4,104     *spr_inc(r3) 
 lis  r5,temp_vscr_blank@h 
 ori r5,r5,temp_vscr_blank@l

 stw r4,12(r5) 
 

 mfmsr r4 
 oris r4,r4,0x0200 
 mtmsr r4 
 sync

 .long  0x7c2028ce 
 .long  0x10000e44 


 lwz r4,67      *spr_inc(r3)
 mtspr hid0,r4 
 lwz r4,68      *spr_inc(r3)
 mtspr hid1,r4 
  lwz r4,69      *spr_inc(r3)
 mtspr iabr,r4 
  lwz r4,70      *spr_inc(r3)
 mtspr dabr,r4 
 lwz r4,52       *spr_inc(r3)
 mtspr mmcr0,r4 
 lwz r4,56       *spr_inc(r3)
 mtspr mmcr1,r4 
 lwz r4,53      *spr_inc(r3)
 mtspr pmc1,r4 
 lwz r4,54      *spr_inc(r3)
 mtspr pmc2,r4 
 lwz r4,57      *spr_inc(r3)
 mtspr pmc3,r4 
 lwz r4,58      *spr_inc(r3)
 mtspr pmc4,r4 
 lwz r4,55     *spr_inc(r3)
 mtspr sia,r4 
 lwz r4,73       *spr_inc(r3)
 mtspr thrm1,r4 
 lwz r4,74       *spr_inc(r3)
 mtspr thrm2,r4 
 lwz r4,75       *spr_inc(r3)
 mtspr thrm3,r4 
 lwz r4,72      *spr_inc(r3)
 mtspr ictc,r4 
 lwz r4,71      *spr_inc(r3)
 mtspr l2cr,r4 
#line 1443
 lwz r4,98     *spr_inc(r3)
 mtspr pir,r4 
 lwz r4,99        *spr_inc(r3)
 mtspr vrsave,r4 
 lwz r4,100      *spr_inc(r3)
 mtspr mmcr2,r4 
 lwz r4,101     *spr_inc(r3)
 mtspr bamr,r4 
 lwz r4,96        *spr_inc(r3)
 mtspr msscr0,r4 
 lwz r4,97        *spr_inc(r3)
 mtspr msscr1,r4 
#line 1462
end_set_regs:

  

 lwz r4,80     *spr_inc(r3) 
 mtsr sr0,r4
 lwz r4,81     *spr_inc(r3) 
 mtsr sr1,r4
 lwz r4,82     *spr_inc(r3) 
 mtsr sr2,r4
 lwz r4,83     *spr_inc(r3) 
 mtsr sr3,r4
 lwz r4,84     *spr_inc(r3) 
 mtsr sr4,r4
 lwz r4,85     *spr_inc(r3) 
 mtsr sr5,r4
 lwz r4,86     *spr_inc(r3) 
 mtsr sr6,r4
 lwz r4,87     *spr_inc(r3) 
 mtsr sr7,r4
 lwz r4,88     *spr_inc(r3) 
 mtsr sr8,r4
 lwz r4,89     *spr_inc(r3) 
 mtsr sr9,r4
 lwz r4,90      *spr_inc(r3) 
 mtsr sr10,r4
 lwz r4,91      *spr_inc(r3) 
 mtsr sr11,r4
 lwz r4,92      *spr_inc(r3) 
 mtsr sr12,r4
 lwz r4,93      *spr_inc(r3) 
 mtsr sr13,r4
 lwz r4,94      *spr_inc(r3) 
 mtsr sr14,r4
 lwz r4,95      *spr_inc(r3) 
 mtsr sr15,r4




 lwz r4,23        *spr_inc(r3) 
 mtspr 528,r4 
 lwz r4,24        *spr_inc(r3) 
 mtspr 529,r4
 lwz r4,27        *spr_inc(r3) 
 mtspr 530,r4
 lwz r4,28        *spr_inc(r3) 
 mtspr 531,r4
 lwz r4,31        *spr_inc(r3) 
 mtspr 532,r4
 lwz r4,32        *spr_inc(r3) 
 mtspr 533,r4
 lwz r4,35        *spr_inc(r3) 
 mtspr 534,r4
 lwz r4,36        *spr_inc(r3) 
 mtspr 535,r4
 
 lwz r4,37        *spr_inc(r3) 
 mtspr 536,r4
 lwz r4,38        *spr_inc(r3) 
 mtspr 537,r4
 lwz r4,39        *spr_inc(r3) 
 mtspr 538,r4
 lwz r4,40        *spr_inc(r3) 
 mtspr 539,r4
 lwz r4,41        *spr_inc(r3) 
 mtspr 540,r4
 lwz r4,42        *spr_inc(r3) 
 mtspr 541,r4
 lwz r4,43        *spr_inc(r3) 
 mtspr 542,r4
 lwz r4,44        *spr_inc(r3) 
 mtspr 543,r4
 
 sync

 lwz r4,79     *spr_inc(r3) 
 mtspr srr1,r4 
 
 
 
 
 
 
 

 blr 
 


.text
.align 2
.global restore_fprs

restore_fprs: 

 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,floating_register_file@h
 ori r3,r3,floating_register_file@l

 add r3,r3,r4 
 lfd f0,0*fpr_inc(r3) 
 lfd f1,1*fpr_inc(r3) 
 lfd f2,2*fpr_inc(r3)
 lfd f3,3*fpr_inc(r3)
 lfd f4,4*fpr_inc(r3)
 lfd f5,5*fpr_inc(r3)
 lfd f6,6*fpr_inc(r3)
 lfd f7,7*fpr_inc(r3)
 lfd f8,8*fpr_inc(r3)
 lfd f9,9*fpr_inc(r3)
 lfd f10,10*fpr_inc(r3)
 lfd f11,11*fpr_inc(r3)
 lfd f12,12*fpr_inc(r3)
 lfd f13,13*fpr_inc(r3)
 lfd f14,14*fpr_inc(r3)
 lfd f15,15*fpr_inc(r3)
 lfd f16,16*fpr_inc(r3)
 lfd f17,17*fpr_inc(r3)
 lfd f18,18*fpr_inc(r3)
 lfd f19,19*fpr_inc(r3)
 lfd f20,20*fpr_inc(r3)
 lfd f21,21*fpr_inc(r3)
 lfd f22,22*fpr_inc(r3)
 lfd f23,23*fpr_inc(r3)
 lfd f24,24*fpr_inc(r3)
 lfd f25,25*fpr_inc(r3)
 lfd f26,26*fpr_inc(r3)
 lfd f27,27*fpr_inc(r3)
 lfd f28,28*fpr_inc(r3)
 lfd f29,29*fpr_inc(r3)
 lfd f30,30*fpr_inc(r3)
 lfd f31,31*fpr_inc(r3)

 blr 



.text
.align 4
.global restore_vrs

restore_vrs: 

 lis r4,process_type@h 
 ori r4,r4,process_type@l
 lbz     r3, 0(r4)
 cmpi    0,0,r3,0x36
 bne     no_altivec_restore

 mfmsr r3 
 oris r4,r3,0x0200 
 mtmsr r4

 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,vector_register_memory@h
 ori r3,r3,vector_register_memory@l
 
 add r3,r3,r4 
 li  r4,0

        .long 0x7c0320ce 
        addi    r4,r4,vr_inc
        .long 0x7c2320ce 
        addi    r4,r4,vr_inc
        .long 0x7c4320ce 
        addi    r4,r4,vr_inc
        .long 0x7c6320ce 
        addi    r4,r4,vr_inc
        .long 0x7c8320ce 
        addi    r4,r4,vr_inc
        .long 0x7ca320ce 
        addi    r4,r4,vr_inc
        .long 0x7cc320ce 
        addi    r4,r4,vr_inc
        .long 0x7ce320ce 
        addi    r4,r4,vr_inc
        .long 0x7d0320ce 
        addi    r4,r4,vr_inc
        .long 0x7d2320ce 
        addi    r4,r4,vr_inc
        .long 0x7d4320ce 
        addi    r4,r4,vr_inc 
        .long 0x7d6320ce 
        addi    r4,r4,vr_inc
        .long 0x7d8320ce 
        addi    r4,r4,vr_inc
        .long 0x7da320ce 
        addi    r4,r4,vr_inc
        .long 0x7dc320ce 
        addi    r4,r4,vr_inc
        .long 0x7de320ce 
        addi    r4,r4,vr_inc
        .long 0x7e0320ce 
        addi    r4,r4,vr_inc
        .long 0x7e2320ce 
        addi    r4,r4,vr_inc
        .long 0x7e4320ce 
        addi    r4,r4,vr_inc
        .long 0x7e6320ce 
        addi    r4,r4,vr_inc
        .long 0x7e8320ce 
        addi    r4,r4,vr_inc
        .long 0x7ea320ce 
        addi    r4,r4,vr_inc 
        .long 0x7ec320ce 
        addi    r4,r4,vr_inc
        .long 0x7ee320ce 
        addi    r4,r4,vr_inc
        .long 0x7f0320ce 
        addi    r4,r4,vr_inc
        .long 0x7f2320ce 
        addi    r4,r4,vr_inc
        .long 0x7f4320ce 
        addi    r4,r4,vr_inc
        .long 0x7f6320ce 
        addi    r4,r4,vr_inc
        .long 0x7f8320ce 
        addi    r4,r4,vr_inc
        .long 0x7fa320ce 
        addi    r4,r4,vr_inc
        .long 0x7fc320ce 
        addi    r4,r4,vr_inc
        .long 0x7fe320ce 

no_altivec_restore:

 blr 



.text
.align 2
.global restore_gprs

restore_gprs: 

 lis r3,offset@h
 ori r3,r3,offset@l
 lwz r4,0(r3)

 lis r3,general_register_file@h
 ori r3,r3,general_register_file@l

 add r3,r3,r4 
 lwz r0,0*gpr_inc(r3) 
 
 
 
 lwz r4,1*gpr_inc(r3) 
 mtspr sprg1,r4
 lwz r4,2*gpr_inc(r3) 
 mtspr sprg2,r4
 lwz r4,3*gpr_inc(r3) 
 mtspr sprg3,r4
 lwz r4,4*gpr_inc(r3) 
 lwz r5,5*gpr_inc(r3)
 lwz r6,6*gpr_inc(r3)
 lwz r7,7*gpr_inc(r3)
 lwz r8,8*gpr_inc(r3)
 lwz r9,9*gpr_inc(r3)
 lwz r10,10*gpr_inc(r3)
 lwz r11,11*gpr_inc(r3)
 lwz r12,12*gpr_inc(r3)
 lwz r13,13*gpr_inc(r3)
 lwz r14,14*gpr_inc(r3)
 lwz r15,15*gpr_inc(r3)
 lwz r16,16*gpr_inc(r3)
 lwz r17,17*gpr_inc(r3)
 lwz r18,18*gpr_inc(r3)
 lwz r19,19*gpr_inc(r3)
 lwz r20,20*gpr_inc(r3)
 lwz r21,21*gpr_inc(r3)
 lwz r22,22*gpr_inc(r3)
 lwz r23,23*gpr_inc(r3)
 lwz r24,24*gpr_inc(r3)
 lwz r25,25*gpr_inc(r3)
 lwz r26,26*gpr_inc(r3)
 lwz r27,27*gpr_inc(r3)
 lwz r28,28*gpr_inc(r3)
 lwz r29,29*gpr_inc(r3)
 lwz r30,30*gpr_inc(r3)
 lwz r31,31*gpr_inc(r3)

 blr 



.text
.align 2
.global restore_partial_dink

restore_partial_dink:

        addis   r4,0,0
        ori     r4,r4,dink_offset*4 

        lis     r3,offset@h
 ori r3,r3,offset@l
        stw     r4,0(r3) 

        lis     r3,general_register_file@h
 ori r3,r3,general_register_file@l

        add     r3,r3,r4 

        lwz     r1,1*gpr_inc(r3) 

        lis     r3,special_register_file@h 
        ori r3,r3,special_register_file@l

 add     r3,r3,r4 

 lwz r4,23        *spr_inc(r3) 
 mtspr 528,r4
 lwz r4,24        *spr_inc(r3) 
 mtspr 529,r4
 lwz r4,27        *spr_inc(r3) 
 mtspr 530,r4
 lwz r4,28        *spr_inc(r3) 
 mtspr 531,r4
 lwz r4,31        *spr_inc(r3) 
 mtspr 532,r4
 lwz r4,32        *spr_inc(r3) 
 mtspr 533,r4
 lwz r4,35        *spr_inc(r3) 
 mtspr 534,r4
 lwz r4,36        *spr_inc(r3) 
 mtspr 535,r4

 lwz r4,37        *spr_inc(r3) 
 mtspr 536,r4
 lwz r4,38        *spr_inc(r3) 
 mtspr 537,r4
 lwz r4,39        *spr_inc(r3) 
 mtspr 538,r4
 lwz r4,40        *spr_inc(r3) 
 mtspr 539,r4
 lwz r4,41        *spr_inc(r3) 
 mtspr 540,r4
 lwz r4,42        *spr_inc(r3) 
 mtspr 541,r4
 lwz r4,43        *spr_inc(r3) 
 mtspr 542,r4
 lwz r4,44        *spr_inc(r3) 
 mtspr 543,r4

 lwz r4,79     *spr_inc(r3) 
 mtmsr r4 
 
 
 
 
 
 sync

 blr 


.text
.align 2
.global read_PVR_from_processor

read_PVR_from_processor:

 mfspr  r3, pvr 
 li  r4, 16 
 srw  r3, r3, r4 

 blr
#line 1849
.text
.align 2
.global read_MPC106_reg

read_MPC106_reg:

        lis     r8, config_addr@h
        ori     r8, r8, config_addr@l
        lwzx    r5, 0, (r8) 
        lis     r8, config_data@h
        ori     r8, r8, config_data@l
        lwzx    r6, 0, (r8) 

 addi r7, r3, 0 
 slwi r3, r3, 24 
 ori r3,r3,0x0080  
 stw r3, 0(r5) 


 cmpi 0,0,r4,4        
 bne read_halfword
 lwbrx r3, 0, (r6) 
 blr 

read_halfword:
 cmpi 0,0,r4,2
 bne read_byte
 andi. r7, r7, 0x0002 
 lhbrx r3, r7, r6 

 blr 

read_byte:
 cmpi 0,0,r4,1
 bne no_read_mpc106
 andi. r7, r7, 0x0003 
 lbzx r3, r7, r6 
 blr 

no_read_mpc106:
 blr
#line 1900
.text
.align 2
.global write_MPC106_reg

write_MPC106_reg:

        lis     r8, config_addr@h
        ori     r8, r8, config_addr@l
        lwzx    r6, 0, (r8) 
        lis     r8, config_data@h
        ori     r8, r8, config_data@l
        lwzx    r7, 0, (r8) 

 addi r8, r3, 0 
 slwi r3, r3, 24 
 ori r3,r3,0x0080
 stw r3, 0(r6) 


 cmpi 0,0,r5,4        
 bne write_halfword
 stwbrx r4,0,(r7) 


 blr 

write_halfword:
 cmpi 0,0,r5,2        
 bne write_byte
 andi. r8, r8, 0x0002 
 sthbrx r4, r8, (r7) 

 blr 

write_byte:
 cmpi 0,0,r5,1        
 bne no_write_mpc106
 andi. r8, r8, 0x0003 
 stbx r4, r8, (r7) 

 blr 

no_write_mpc106:
 blr