Russell P. Kraft
Senior Project Manager, Adjunct Assistant Professor
Rensselaer Polytechnic Institute
Ph.D., Electrical Engineering, Rensselaer Polytechnic Institute,
M. Eng., Electrical Engineering, Rensselaer Polytechnic Institute,
B.S., Electrical Engineering, Rensselaer Polytechnic Institute,
Kraft joined the research staff of the Center for Integrated
Electronics (CIE) in 1995. He currently also serves as an
adjunct assistant professor in the Electrical, Computer, and
Systems Engineering Department (ECSE) as well as the Computer
He spent the previous nine years as senior
project manager for the Center for Manufacturing Productivity
at Rensselaer. Before joining the university, he served as
a senior controls engineer for the research and development
division of Mechanical Technology Inc., in Latham, N.Y. for
four years. While a student at Rensselaer, Kraft also taught
courses in the ECSE department for two years.
Kraft has published over 40 conference articles
and 13 journal articles. He has seven other articles in preparation
and three in review in the Very Large Scale Integration (VLSI)
area. Kraft has two patents in the computer-vision area for
non-contact gauging and is co-author of several publications
in machine vision, ultrasonic imaging, phased array design,
homomorphic signal processing and control system design.
For the past several years, Kraft has been affiliated with
the Defense Advanced Research Projects Agency (DARPA) integrated
circuit design project for Fast Reduced Instruction Set Computer
(RISC) design using GaAs/AlGaAs Heterojunction Bipolar Transistor
(HBT) technology. This project is now fully involved in many
aspects of the new IBM SiGe HBT/CMOS technology through several
generations of their commercially available and unreleased
design kits, which permit (VLSI) at tens of gigahertz clock
speeds. The high speed circuits being designed have been expanded
to include field programmable gate arrays (FPGAs), field programmable
analog arrays (FPAAs), analog to digital converters (ADCs),
serializer/deserializer (SERDES) communications circuits,
single event upset (SEU) tolerant logic, and clockless logic.
Kraft has extensive skills using COMPASS
Tools, CADENCE Integrated Circuit Design System, and MENTOR
Computer Aided Design Tools. His specialty is in evaluating
the impact of interconnections on architecture. He is certified
to use Rensselaer's class 100 clean room, where he has been
involved in the design and process development of a new 3D
chip stacking process for higher integration and faster digital
Kraft has a broad background in research
in robotics, control systems analysis and design, ultrasonic
imaging, phased array design, digital and analog signal processing
(linear signals or images), as well as pattern recognition.
Additionally, he has practical experience in computer interfacing,
integration, networking, and real-time application programming
on multiprocessor systems.
His background in control theory has been
applied to the design and fabrication of complete working
systems while managing teams of engineers, technicians, and
students, both graduate and undergraduate. He has also been
involved with projects that integrated servo controlled xyz
and theta stages, analog data acquisition boards, robots,
and other special function peripherals with microprocessor
controllers and has directed as well as participated directly
in the development of the dedicated software used to drive
all the components.
D. Gupta, A.M. Kadin, R.J. Webber, I. Rochwarger, D. Bryce,
W.J. Hollander, Y.U. Yim, Channakeshav, R.P. Kraft, J.-W.
Kim, and J.F. McDonald, "Integration of Cryocooled Superconducting
Analog-to-Digital Converter and SiGe Output Amplifier,"
in review, Institute of Electrical and Electronics Engineers
(IEEE) Transactions on Applied Superconductivity.
I. Fidan, S. Tumkor, and R.P. Kraft, "The
Development of an Electronic Manufacturing Knowledge Base
Case Study: Fine Pitch SMT Laser Soldering," accepted
by the IEEE Journal of Electronics Manufacturing.
J.R. Guo, C. You, K. Zhou, M. Chu, B.S.
Goda, R.P. Kraft, J.F. McDonald, "A Scalable 2 V, 20
GHz FPGA using SiGe HBT BiCMOS Technology," Eleventh
International Symposium on Field Programmable Gate Arrays
(ISFPGA), Monterey, Calif., (February 2003).
J.-Q. Lu, Y. Kwon, A. Jindal, K.-W. Lee,
J. McMahon, G. Rajagopalan, A.Y. Zeng, R.P. Kraft, B. Altemus,
B. Xu, E. Eisenbraun, J. Castracane, J.F. McDonald, T.S. Cale,
A. Kaloyeros, R.J. Gutmann, "Processing Technology for
High Density Multifunctional Integration (HDMI) using Wafer
Bonding and Monolithic Inter-Wafer Interconnection,"
(invited), Proceedings of 19th International VLSI Multilevel
Interconnection (VMIC) Conference, 445-454, Singapore,
K. Zhou, Channakeshav, J.-R. Guo, C. You,
J. Mayega, B.S. Goda, M. Chu, Y. U. Yim, J.-W. Kim, P.F. Curran,
R.P. Kraft, and J.F. McDonald, "Implementation of Gigahertz
1-bit Full Adder on SiGe FPGA," 2002 Military and
Aerospace Programmable Logic Devices (MAPLD) International
Conference, Laurel, Maryland, (September 2002).
S.R. Carlough, R.A. Philhower, C.A. Maier,
S.A. Steidl, P.M. Campbell, A. Garg, K.-S. Nah, M.W. Ernest,
J.R. Loy, T.W. Krawczyk Jr., P.F. Curran, R.P. Kraft, H.J.
Greub, and J.F. McDonald, "A 2GHz Clocked AlGaAs/GaAs
HBT Byte-Slice Datapath Chip," IEEE Journal of Solid
State Circuits, 35,
6, 885-894, (June 2000).
B.S. Goda, J.F. McDonald, S.R. Carlough,
T.W. Krawczyk Jr., and R.P. Kraft, "SiGe HBT BiCMOS FPGAs
for Fast Reconfigurable Computing," Institution of
Electrical Engineers (IEE) Proceedings, Computers and Digital
Techniques, 147, (3),
189-194, (May 2000).
B.L. Halpern, P. Komarenko, P.D. Fuqua,
J.F. McDonald, G.R. Yang, J. Fortin, B. Wang, J. Diao, H.Q.
Lu, M. Tomozowa, I. Matthew, R.P. Kraft, T.M. Lu, H. Bakhru,
and A. Kumar, "Properties of Parylene-N Using Atomic
Hydrogen Enhanced Jet Vapor Deposition," Journal on
Dielectrics for ULSI Multilevel Interconnection, Institute
for Microelectronics InterConnection (IMIC), 1, 1, 29-42,
I. Fidan and R.P. Kraft, "Integrated
User Interface Design for Electronics Remanufacturing Systems,"
Proceedings of 24th IEEE/CPMT IEMT Symposium, 54-63,
Austin, Texas, (October 1999).
A. Garg, Y.L. Le Coz, H.J. Greub, R.B. Iverson,
R.F. Philhower, P.M. Campbell, C.A. Maier, S.A. Steidl, M.W.
Ernest, R.P. Kraft, S.R Carlough, J.W. Perry, T.W. Krawczyk,
and J.F. McDonald, "Accurate High-Speed Performance Prediction
for Full Differential Current-Mode Logic: The Effect of Dielectric
Anisotropy," IEEE Transactions on CAD, 18,
(2), 212-219, (February 1999).
Center for Integrated Electronics
Rensselaer Polytechnic Institute
Troy, N.Y. 12180
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