"Cell Library for Current Mode Logic using an Advanced Bipolar Process," (J. F. McDonald, H. J. Greub, T. Yamaguchi, and T. Creedon), I.E.E.E. J. Sol. State Cir., Special issue on VLSI, (D. Bouldin, guest editor), I.E.E.E. Trans. on Solid State Circuits, Vol. JSSC-26(#5), pp. 749-762, May, 1991.

"F-RISC/I: Fast Reduced Instruction Set Computer with GaAs H-MESFET Implementation," Proc. I.E.E.E. Int. Conf. on Computer Des., (J. F. McDonald, C. K. Tien, C. C. Poon, H. Greub) Boston, MA, (I.E.E.E. Cat. # CH3040-3/91/0000/0293), pp. 293-296, October 14-16, 1991.

"F-RISC/G: AlGaAs/GaAs HBT Standard Cell Library," (K. Nah, R. Philhower, J. S. Van Etten, S. Simmons, V. Tsinker, J. Loy, H. Greub, and J. F. McDonald), Proc. I.E.E.E. Int. Conf. on Computer Des., Boston, MA, (I.E.E.E. Cat. # -3/91/0297), pp. 297-300, October, 1991.

"Wideband Wafer-Scale Interconnection in a Wafer Scale Hybrid Package for a 1000 MIPS Highly Pipelined GaAs/AlGaAs HBT Reduced Instruction Set Computer," (J. F. McDonald, R. Philhower, J. S. Van Etten, S. Dabral, K. Nah, and H. Greub), Proc. 1992 Int. Conf. on Wafer Scale Integration, ICWSI-4, San Francisco, January 20, 1992, Reprinted Hardbound by Computer Science Press, V. K Jain, and P. W. Wyatt, Eds. [I.E.E.E. CS#2482], pp. 145-154.

"Bypass Capacitance for WSI/WSHP Applications," (J. F. McDonald, H. Greub, R. Philhower, J. Van Etten, K. S. Nah, P. Campbell, C. Maier, Lt. C. J. Loy, P. Li, L. You, and T.-M. Lu), Proc. Fifth Int. Conf. on WSI, ICWSI93, San Francisco, CA, M. Lea, Ed., I.E.E.E. Computer Soc. Press, pp. 218-228, February, 1993.

"Fluorinated Parylene as an Interlayer Dielectric for Thin Film MultiChip Modules," (J. F. McDonald, S. Dabral, X. Zhang, W. M. Wu, G.-R. Yang, C. Lang, H. Bakhru, R. Olsen and T.-M. Lu), spring 1992 meeting of the Materials Research Society, Reprinted in Vol. 264 of the MRS Symposium Proceedings, Electronic and Packaging Materials Science VI, Paul S. Ho, K. A. Jackson, C.-Y. Li and G. F. Lipscomb, Eds., pp. 83-90, 1993.

"A 500ps 32 X 32 Register File Implemented in GaAs/AlGaAs HBT's," (J. F. McDonald, K. S. Nah, R. Philhower, and H. Greub), Proc. I.E.E.E. GaAs Symposium [I.E.E.E. Cat. 93CH3346-4], San Jose, Oct. 1993, pp. 71-75.

"F-RISC/I: A 32 Bit RISC Processor Implemented in GaAs H-MESFET Super Buffer Logic," (J. F. McDonald, C. K. Tien, K. Lewis, R. Philhower, and H. J. Greub), Proc. I.E.E.E. GaAs Symposium [I.E.E.E. Cat. #93CH3346-4], San Jose, CA, Oct. 1993, pp. 145-148.

"Frequency Domain (1kHz-40GHz) Characterization of Thin Films for Multichip Module Packaging Technology," (J. F. McDonald, W.-T. Liu, S. Cochrane, X.-M. Wu, P. K. Singh, X. Zhang, D. B. Knorr, E. J Rymaszewski, J. M. Borrego, and T.-M. Lu), Elect. Lett., Jan. 20, 1994, Vol. 30(#2), pp. 117-118.

"Poly-tetrafluoro-p-xylylene as a Dielectric for Chip and MCM Applications," (J. F. McDonald, S. Dabral, G.-Y. Yang, X. Zhang, & T.-M. Lu, J. Vac. Sci. and Technol., B 11(#5), Sept./Oct. 1993, pp. 1825-1830.

"Application of a Floating-Random-Walk Algorithm for Extracting Capacitances in a Realistic HBT Fast-RISC RAM Cell," (J. F. McDonald, Y. L. Le Coz, R. B. Iverson, H. J. Greub, P. M. Campbell, and J. F. McDonald), Proc. I.E.E.E. VLSI Multi-Layer Interconnect Conf., V-MIC94, Santa Clara, CA, June, 1994, pp. 542-544.

Design of a Package for a High Speed Processor Made with Yield Limited Technology," (J. F. McDonald, A. Garg, J. Loy, and H. Greub), Proc. I.E.E.E. Fourth Great Lakes Symposium on VLSI, March 4-5, 1994, Notre Dame University, Indiana, [I.E.E.E. Cat. #94^TH0603-1, Comp. Soc. # 5610-02], pp. 110-113.

"Wiring Pitch Integrates MCM Wiring Domains," (J. F. McDonald, J. Loy, A. Garg, M. Krishnamoorthy), Proc. I.E.E.E. Fourth Great Lakes Symposium on VLSI, March 4-5, 1994, Notre Dame University, Indiana, [I.E.E.E. Cat. #94^TH0603-1, Comp. Soc. # 5610-02], pp. 110-113.

"Differential Routing of MCMs - CIF: The Ideal Bifurcation Medium," (J. F. McDonald, J. Loy, A. Garg, M. Krishnamoorthy), Proc. I.E.E.E. Int. Conf. on Computer Des., Cambridge, MA, [I.E.E.E. Cat. # 94CH35712], pp. 599-603, October 10-12, 1994.

"Thermal Design of an Advanced Multichip Module for a RISC Processor," (J. F. McDonald, A. Garg, J. Loy, H. Greub, T.-L. Sham), Proc. I.E.E.E. Int. Conf. on Computer Des., Cambridge, MA, [I.E.E.E. Cat. # 94CH35712], pp. 608-611, October 10-12, 1994.

"Three Dimensional Stacking with Diamond Sheet Heat Extraction for Subnanosecond Machine Design," (J. F. McDonald, H. Greub, A. Garg, P. Campbell, S. Carlough, C. Maier), Proc. 1995 Int. Conf. on Wafer Scale Integration, ICWSI-7, San Francisco, January 20-22, 1995, Reprinted in Hardbound by Society Press, S. K. Tewksbury, and G. Chapman, Eds. [I.E.E.E. CS #2482], pp. 62-71.

"Design of a 32-bit Monolithic Microprocessor Based on GaAs H-MESFET Technology," (J. F. McDonald, C.-K. V. Tien, K. Lewis, H. J. Greub, and T. Tsen), in review for I.E.E.E. Transactions on VLSI Systems,".

"A Very Wide Bandwidth Digital VCO Implemented in GaAs HBT's Using Frequency Multiplication and Division," (J. F. McDonald, P. M. Campbell, H. J. Greub, A. Garg, S. Steidl, C. Maier, and S. Carlough), Proc. 17th Ann. I.E.E.E. GaAs Symposium, San Diego, CA, October 29-November 1, 1995.

"Metal-Parylene Interaction Systems," (J. F. McDonald, S. Dabral, X. Zhang, B. Wang, G.-R. Yang, and T.-M. Lu), Mat. Res. Soc. Proc., Vol. 381, in "Low K Dielectrics," S. Murarka, T.-M. Lu, T.-S. Kuan, and H. C. Ting, Eds., pp. 205-218, 1995.

"Low Dielectric Constant Polymers for On-Chip Interlevel Dielectrics with Copper Metallization," (J. F. McDonald, R. J. Gutmann, T. Paul Chow, D. J. Duquette, T.-M. Lu, and S. P. Murarka), Mat. Res. Soc. Proc., Vol. 381, in "Low K Dielectrics," S. Murarka, T.-M. Lu, T.-S. Kuan, and H. C. Ting, Eds., pp. 177-195.

"Unterminated Bonds in Parylene-N Films," (J. F. McDonald, X. Zhang, B. Wang, and S. Dabral), Semiconductor International, Vol. 14, December 1995, pp. 89-94.

"Crystallinity Properties of Parylene N Affecting ILD Applications," ( ), Paper H2.11 at the ICMCTF 95, reprinted in Thin Sol. Films, Vol. 270, (1-2), pp. 508-511, December 1, 1995.

"Improvement of Parylene N Deposition Rate by Electric Field," (J. F. McDonald, B. Wang, T.-M. Lu, and G. Yang), I.E.E.E. Dielectrics for Ultralarge Scale Integration Multilayer Interconnection Conference, DUMIC 96, Santa Clara Mariott Hotel, Santa Clara, CA, pp. 214-221, February 20-21, 1996.

"Very Fast RISC Processors - Subnanosecond Computing using High Performance HBT Devices and MCM packaging," (J. F. McDonald and H. Greub). Gov. Microcir. Applic. Conf., GOMAC96, Orlando, Hyatt Orlando Inn, Orlando, Florida, March 29-21, 1996, pp. 217-221,

"Chip Pad Migration is a Key Component in High Performance MCM Design," (J. F. McDonald, J. Loy. A. Garg, and M. Krishnamoorthy), Sixth Great Lakes Symposium on VLSI, GLSVLSI96, (I.E.E.E Cat. 96TB100041), Iowa State University, March 22-23, 1996, pp. 96-99.

"Fast RISC Design using 100 GHz HBT and Microwave HDI MCM Technology, " (J. F. McDonald and H. Greub), RADC Workshop on Academic Electronics in New York State, Embassy Suites Hotel, Syracuse, New York, June 13-14, 1996, pp. 259-264.

"Dual Damascene Structure Fabrication with Parylene-N as the ILD and Copper as the Interlayer Metal," (J. F. McDonald, B. Wang, C. Steinbruchel, and R. Tacito), 13th ann. VLSI MultiLevel Interconnection Conference, VMIC96, Santa Clara Marriott, Santa Clara, CA, June 18-20, 1996, pp. 58-60.

"A Floating Random Walk Method for Computing Interconnection Capacitances," (J. F. McDonald, Y. L. Le Coz, H. J. Greub, A. Garg, and R. Iverson), 13th ann. VLSI MultiLevel Interconnection Conference, VMIC96, Santa Clara Marriott, Santa Clara, CA, June 18-20, 1996, pp. 230-232.

"High-performance standard cell library and modeling technique for differential advanced bipolar current tree logic," (H. J. Greub, et. al.) IEEE Journal of Solid-State Circuits, Vol. 26, No. 5, pp. 749-62, May 1991.

Hans J. Greub, "FRISC - A fast reduced instruction set computer for implementation with advanced bipolar and hybrid wafer scale technology," Ph.D. dissertation, Rensselaer Polytechnic Institute, December 1990.

Lt. Comdr. James Loy, "Differential Routing Tools for High Speed GaAs HBT CML Circuits," Ph.D. Dissertation, Rensselaer Polytechnic Institute, 1993.

Robert Philhower, "Spartan RISC Architecture for Yield Limited Technology," Ph.D. Dissertation, Rensselaer Polytechnic Institute, 1993.

Cliff Maier, "A testing scheme for a sub-nanosecond access time static RAM," Masters Thesis, Rensselaer Polytechnic Institute, 1994.

Kyung Suc Nah, "An Adaptive Clock Deskew Scheme and a 500 ps 32 by 8 Bit Register File for a High Speed Digital System," Ph.D. Dissertation, Rensselaer Polytechnic Institute, 1994.

C.-K. Vincent Tien, "System Design, Analysis, Implementation and Performance Evaluation of a 32 Bit RISC Processor Based on GaAs HMESFET Technology," Ph.D. Dissertation, Rensselaer Polytechnic Institute, 1995.

Xin Zhang, "Parylene as an interlayer dielectric," Ph.D. Dissertation, Rensselaer Polytechnic Institute, 1995.

Cliff Maier, "High Speed Microprocessor Cache Memory Hierarchy for Yield Limited Technology," Ph.D. Dissertation, Rensselaer Polytechnic Institute, August, 1996.