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The topic of this project is the exploration of whether HBT devices can be used to make single uniprocessor or superscalar computing engines, with many GOPS of throughput at modest power dissipation and expense. As we approach the year 2000 the future of commercial CMOS below 0.15m feature sizes is unclear. Certainly the cost of submicron fabrication facilities is becoming very large. The F-RISC project argues that the HBT makes much more sense as the device to carry US High Performance computing through the next century for clock rates exceeding 10 GHz. Early work involved GaAs design. Most recently SiGe HBTs have been explored. The latter devices seem to be scaling more aggressively leading to high speed with low power while offering high device yields and co-integration with CMOS for cache memory.