Slide 28 of 64
We have repeatedly cautioned in all our DARPA proposals about an impending problem in CMOS due to Vth uncertainties when the total number of dopant atoms in CMOS FET channels grow few in number due to continued scaling. The ìfixî for this is to attempt to set Vth by non doping methods. One of these is illustrated in this slide and it is the dual gate method. Two gates are doped heavily above and below the channel in an effort to set Vth by work function methods and not doping. The technique can also be used to improve transconductance. But the device becomes almost as complex as an HBT.