Slide 60 of 64
Here we see the as fabricated chip. The huge amount of M3 wiring used essentially makes the details of the circuit unobservable under all that gray metal. The circuit has not yet been tested as we have only just received the wafer. Predicted speed should be in the 6-7 GHz range but we will have to see what the measurement says. The 8 GHz operation we might like to see can be captured by moving the register file address decoding back into the previous phase of the pipeline. Triple porting means we can improve the CPI of the core processor. L0 cache could be created from this same circuit.