ï Ultra small 50 GHz fT SiGe HBTís offer high speed AND low power in a HIGH yield process, Cointegration with contemporary CMOS, sharing High Performance Wiring (~6L Cu, ~ Low-K ILDís).
ï Preliminary sampling of the 0.5 micron IBM SiGe HBT/CMOS process confirms at least 14ps tpd at 3mW per current tree, allowing 3 gate delay equivalents for a 3 high CML current tree (no inverters in CML and complex functions per current tree) this is
ï From published data one can guess the next generation commercial SiGe HBT/CMOS process may offer ~100 GHz ft HBTs at ~0.2-0.3 microns,cointegrated with, a ~0.25 micron CMOS technology. The might be approximately at the same speed power level as Hit
ï These technologies permit construction of a 16 GHz clock VLIW 8- way superscalar (1/8th TeraOPS) at approximately 100 Watts.
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