Other formats availible: [RTF],
190 Hoosick St., Apt. 3
Troy, NY 12180
Personal Email: email@example.com
Room 6126, CII
Rensselaer Polytechnic Institute
Troy, NY 12180
Lab Email: firstname.lastname@example.org
A challenging position in Computer Engineering emphasizing high-speed digital
and mixed-mode ASIC design and BiCMOS design.
PhD, Electrical Engineering, expected August 2002,
Rensselaer Polytechnic Institute, Troy, NY.
Preliminary thesis title: “Critical ALU Path Optimization and Implementation
in a BiCMOS Process for Gigahertz Range Processors”. GPA: 3.94/4.0.
MS (w/thesis), Electrical Engineering, December 1996,
Rensselaer Polytechnic Institute, Troy, NY.
Thesis title: “An Optimization Of Critical ALU Paths And Implementation
Considerations”. GPA: 4.0/4.0.
BS, Computer and Systems Engineering, December 1994,
Rensselaer Polytechnic Institute, Troy, NY. GPA: 3.813/4.0
(4.0/4.0 in ECSE Department), Magna Cum Laude.
Center for Innovation in Electronics and Electronics Manufacturing (CIEEM),
RPI, Troy, NY
- June 1995-Present: Research Assistant, F-RISC (HBT Fast RISC Processor)
Project. Performed digital circuit design, Silicon Germanium circuit and full-custom
layout design, adder logic design, mixed-mode simulations, VLSI design, VLSI layout
verification, VLSI testing, ALU optimization, reticle planning and assembly,
Electrical, Computer, and Systems Engineering (ECSE) Department, RPI, Troy, NY
- January 1995-May 1999, August 2000-December 2000: Teaching Assistant.
Wrote and graded homework and tests. Developed new laboratory experiments.
Supervised laboratory sessions. Provided extra out-of-class instruction.
Lectured occasionally. Classes included: Computer Hardware Design, Computer
Organization and Logic Design, Electronics and Instrumentation,
Laboratory Introduction to Embedded Control, Computer and Microprocessor Lab.
UPAC Sound, Rensselaer Union, Troy, NY
- January 1993-May 1994: Equipment Manager. Maintained sound reinforcement equipment.
- September 1992-December 1994: Team Leader. Operational head of sound show.
- September 1991-September 1992: Technician.
Reon Alpha Micro Support, Utica, NY
- 1986-1995: Part-time programmer for family business. Maintained custom software for mailing lists, college grade records, etc. Minor computer maintenance and repair.
Rome Air Development Center, Griffis A.F.B., Rome, NY
- June-August 1989: Internship through New York Academy of Sciences.
VHDL programmer in Reliability Microphysics branch.
Secondary Authorship, published
- “A 2GHz Clocked AlGaAs/GaAs HBT Byte-Slice Datapath Chip”, S. Carlough, R. Philhower, C. Maier, S. Steidl, P. Campbell, A. Garg, K. Nah, M. Ernest, J. Loy, T. Krawczyk Jr., P. Curran, R. Kraft, H. Greub, J. McDonald. IEEE Journal of Solid-State Circuits, Vol. 35, no. 6, June 2000, pp 885-894.
- “Programmable Logic Devices”, Steven R. Carlough, Pete M. Campbell, Samuel A. Steidl, Atul Garg, Cliff A. Maier, Hans J. Greub, John F. McDonald, Matthew W. Ernest. Wiley Encylopedia of Electrical and Electronics Engineering, Vol. 17 Po-Ra, pp. 348-357. New York, 1999.
- “Accurate High-Speed Performance Prediction for Full Differential Current-Mode Logic: The Effect of Dielectric Anisotropy”, A. Garg, Y.L. Le Coz, H.J. Greub, R. B. Iverson, R. F. Philhower, P. M. Campbell, C. A. Maier, S.A. Steidl, M. W. Ernest, R. P. Kraft, S. R. Carlough, J. W. Perry, T.W. Krawczyk, and J. F. McDonald. IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems, Vol 18 no.2 pp 212-218, February 1999.
- “A Very Wide Bandwidth Digital VCO Using Quadrature Frequency Multiplication and Division Implemented in AlGaAs/GaAs HBT’s”, Campbell, Peter M.;Greub, Hans J.; Garg, Atul; Steidl, Samuel A.; Carlough, Steven; Ernest, Matthew; Philhower, Robert; Maier, Cliff; Kraft, Russel P.; McDonald, John F. IEEE Transanactions On Very Large Scale Integration Systems, Vol.6 no. 1 pp 52-55, March 1998
- “16 GHz Fast Risc Engine Using GaAs/AlGaAs and SiGe Technology”, Steidl, S.; Carlough, S.; Ernest, M.; Garg, A.; Kraft, R.; McDonald, J. F. Procedings of the Annual IEEE International Conference on Innovative Systems in Silicon, Oct. 8-10 1997, Austin, TX.
- “Embedded At-Speed Testing Schemes with Low Overhead for High Speed Digital Circuits on Multi-Chip Modules”, Maier, Cliff; Greub, Hans; Philhower, Robert; Steidl, Sam; Garg, Atul; Ernest, Matthew; Carlough, Steve; Campbell, Pete; McDonald, John F. Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon. Oct. 9-11, 1996, Austin, TX.
Design Tools/Languages: Cadence Design System, QuickCap, COMPASS (VTITools), Spectre, Star-HSPICE, PALASM, PowerView, Verilog, VHDL. Exposure to: LASAR, MAGIC, Matlab.
Other design keywords: Bipolar, BiCMOS, Current Mode Logic, Differential Signals, full-custom layout, HBT, Interconnect Parasitics, Pseduo-Carry Look-ahead, RC Delay, SiGe, Silicon Germanium, 3d Capacitance extraction, VLSI.
General Languages: C, HTML, Perl, TCL. Exposure to: Ada, BASIC, C++, LISP, MC68000 and 68HC11 assembler, Pascal, Prolog, X Window System (primarily Motif Widgets).
- Intel Foundation Fellow, 1999-2000.
- Outstanding ECSE TA Award nominee: 1995, 1999
- Eta Kappa Nu (National EE Honor Society)
- Archer Center for Student Leadership Development Certificate of Leadership: 1993, 1994
- Dean's List of Distinguished Students: 1992-1995
- The National Dean's List: 1992-1995
- National Merit Scholar
- New York State Board of Regents Scholar
- Member, Association for Computing Machinery (ACM), International and RPI Student Chapter. SIGARCH member.
- Student Member, IEEE, International and RPI Student Chapter. Computer Society and Solid State Circuits Society member.
- Alumnus, Zeta Beta Tau Fraternity, Kappa Nu Kappa Chapter: Fall 1992, Secretary; Fall 1993 and Spring 1994, Scholarship Chair; Fall 1994, House Manager; Fall 1995, Ritual Chair.
- NACA East Coast Regional Conference October 1993 Pre-Conference Seminar: Presenter on College Sound and Lighting Systems.
- GRE General Test 6/94: Verbal, 780; Quantitative, 790; Analytical, 790