Appendix A

High-Speed Voltage-Controlled Oscillator Testing Procedure

Overview

In order to further understand the capabilities of the Rockwell 50 GHz process, the design and layout of a high-speed voltage-controlled oscillator (VCO) was undertaken. The target frequency range for the VCO was 1 to 20 GHz. The components which make up the high-speed VCO are shown in Figure A.1. These consist of a VCO core which operates at 1 to 5 GHz, a frequency multiplier which produces 2X and 4X the core frequency, a frequency prescaler which produces 1/8, 1/4, and 1/2 the synthesized frequency (1-20 GHz), a high-bandwidth driver, a high-bandwidth receiver and several high-bandwidth multiplexers. A ring-oscillator was also included in the design to characterize the transistors in the vicinity of the high-speed VCO circuitry. In order to improve yield, much effort was expended to allow multiple paths for testing the circuitry and extracting information. Figure A.1 contains an overview of the system, Figure A.2 depicts the VCO core and multiplier, Figure A.3 depicts the prescaler circuit, and Figure A.4 shows the chip layout and pad-out.

Figure A.1 - Block-level VCO Schematic

Figure A.2 - VCO Core & Multiplier

Figure A.3 - Prescaler Circuit

Testing Methodology

The testing of the High-Speed VCO has been carefully thought out, providing multiple signal paths through the circuit. Test probe sites are shown in Figure A.2. Only one probe (probe site 1) is required to perform a rudimentary test of the VCO, although the other three probe sites may be used to exercise and provide additional high-speed test features and signal paths. These probes are listed below along with their function.

Probe site #1 is used to provide the VCO control voltage, to select the multiplication factor for the VCO (1X, 2X, 4X), to select the output signal (either from the VCO core, the multiplier, or the prescaler) and to provide power and ground to the circuit. Probe site #4 is used optionally to provide a external high-speed clock signal (up to 20 GHz) to the circuit, allowing the prescaler circuitry to be tested independently of the signals generated on-chip. Probe site #2 is the high-speed output for the circuit, providing signals from 1-20 GHz. Probe site #3 can be used to control the prescaler circuit, selecting a divisor of 1, 2, 4 or 8. The default (i.e. no probe) divisor value is 2. The signal which is to be divided may generated either by the on-chip VCO circuitry or by an external source connected to probe site #4.

Figure A.4 - VCO Layout & Pad-out

Multiplexer Signals

Other Signals

There are a few other signals which need to be specified or may be observed. These signals are listed below along with a description of the signal.

Test Procedure

There are numerous tests which need to be performed in order to fully explore the high-speed VCO. These tests are listed below. The VDD voltage for all tests should be approximately -6V (with some minor variations).

• VCO core (frequency range)
• VCO multiplier (frequency range)
• VCO prescaler (frequency range)
• Ring oscillator
• Externally-applied stimulus
• Combination of externally-applied stimulus and prescaler
• Multiplexers / multiple paths through the circuit which have not otherwise been tested

VCO Core

Simulations of the core VCO circuit using PSPICE show that the frequency of oscillation can vary from approximately 2 GHz to 5 GHz, depending upon the applied control voltage (-1 V to + 1V). Simulations were done using a netlist with parasitic capacitance numbers generated by the VTI Tools 2-D capacitance extractor. There are two points at which the VCO core may be observed. Pin 1 of Probe Site #1 is a single-ended version of the core VCO signal which comes directly from the circuit. Probe Site #2 can provide a differential version of the VCO signal, however the signal must traverse the chip and pass through at least one multiplexer. This second path actually goes through the multiplexer which is also used to select the multiplication factor, thus the second method of observation will be considered as part of the multiplier circuit testing.

To test the VCO core, you should apply a control voltage in the range of -1V < voltage < 1V to the VCO and measure the output frequency. For the initial tests, we will observe the signal using the single-ended output. This will allow us to quickly identify working chips and gauge the baseline frequency of the circuit. More in-depth tests will be performed in the testing of the Multiplier.

VCO Multiplier

The multiplier consists of three XOR gates which can multiply the core frequency by a factor of 2 or 4 and a multiplexer which can select a signal with either the core frequency, 2X core or 4X core. In essence, the combined circuitry is referred to as the multiplier and may have an effective multiplication factor of 1X, 2X or 4X. Each multiplication factor should be exercised separately throughout the frequency range of the core VCO. Note that the fourth input to the multiplier multiplexer is the externally-applied stimulus.

To test the multiplier, a control voltage must be applied to the VCO. The first test should measure the 1X multiplication factor (this is actually testing the path from the VCO core through the multiplexer to the high-speed output). The next test should use the 2X multiplication factor and the final test uses the 4X factor. It is probably easiest to leave the control voltage constant and switch the multiplexer select lines in order to ensure that the core frequency is the same for all three tests. These tests should be performed over the entire range of the control voltage, although the triggering frequency of the scope may limit the range of observable results. Note that the select lines for the output multiplexer must select the multiplier input in order to observe the results of testing.

VCO Prescaler

The VCO Prescaler circuit is capable of dividing the frequency of a signal by a factor of 1, 2, 4 or 8 via high-speed toggle flip-flops. Testing the VCO prescaler is somewhat more complex because the input signal for the prescaler comes directly from the multiplier circuit output. This was done intentionally to allow the observation of high-speed signals (e.g. 10-20 GHz) by dividing them and sending out the divided / lower-frequency signal. The prescaler should be tested across the entire output frequency range of the multiplier (and thereby dramatically increasing the number of tests required).

Initially the multiplier will be set to use a factor of 1. For values throughout the range of the control voltage, the output frequency will be measured for each divisor. When the prescaler has been fully characterized for the 1X multiplier, the next multiplication factor will be applied and the prescaler tests repeated. This will continue until all multiplication factors have been used or until the output of the circuit can no longer be observed (either due to circuit or measuring equipment limitations). Note that the select lines for the output multiplexer must select the prescaler input in order to observe the results of testing.

Ring Oscillator

The ring oscillator is our method for estimating the baseline speed of the devices. The output of the ring oscillator is connected directly to the output multiplexer. The output frequency should be measured over a small range of VDD voltages.

VCO Core Testing Procedures

Specifics:

• simulations with parasitic capacitances yield core frequencies between 2 GHz and 5 GHz
• applied control voltage should be -1V < voltage < 1V
• core VCO may be observed at Probe Site 1 pin #1 (leftmost) or Probe Site 2
• to use Probe Site 2, multiplexer selects at Probe Site 1 must be set appropriately
• the use of Probe Site 2 can wait until the testing of the VCO Multiplier

Signal Settings: Probe Site 1

Reticle Site: VCO Chip #: Date:

Personnel:

VCO Multiplier Testing Procedures

Specifics:

• multiplication factors of 1, 2 and 4 available
• simulations with parasitic capacitances yield multiplier frequencies between 2 GHz and approximately 20 GHz
• applied control voltage should be -1V < voltage < 1V
• Probe Site 2 must be used to observe multiplied signals
• Procedure should be to test each multiplication factor for the same control voltage setting before readjusting the voltage

EFS1 & EPS1 multiplexer selects on Probe Site 1 determine multiplication factor

Multiplication Factor Settings: Probe Site 1

EMXS0 & EMXS1 multiplexer selects at Probe Site 1 must be set

Multiplexer Signal Settings: Probe Site 1

Reticle Site: VCO Chip #: Date:

Personnel:

VCO Prescaler Testing Procedures

Specifics:

• division factors of 1, 2, 4, or 8 available
• simulations with parasitic capacitances yield prescaler capable of operating at frequencies up to 20 GHz
• applied control voltage should be -1V < voltage < 1V
• Probe Site 3 must be used to select division factor
• Probe Site 2 must be used to observe divided signals
• Each division factor may be used with any multiplication factor

Procedure should be to test each division factor for the same control voltage setting and multiplication factor before readjusting the voltage or multiplication factor

DMSX0 & DMSX1 multiplexer selects on Probe Site 3 determine division factor

Division Factor Settings: Probe Site 3

EFS1 & EPS1 multiplexer selects on Probe Site 1 determine multiplication factor

Multiplication Factor Settings: Probe Site 1

EMXS0 & EMXS1 multiplexer selects at Probe Site 1 must be set

Multiplexer Signal Settings: Probe Site 1

Reticle Site: VCO Chip #: Date:

Personnel:

VCO Ring Oscillator Testing Procedures

Specifics:

• 12-stage ring oscillator
• Probe Site 2 must be used to observe divided signals
• signal must pass through one multiplexer

EMXS0 & EMXS1 multiplexer selects on Probe Site 2 select ring oscillator

Multiplexer Signal Settings: Probe Site 1

Reticle Site: VCO Chip #: Date:

Personnel:

VCO Power Rail Droop Testing

Specifics:

• two probe points apiece for V_DD & V_SS
• Probe Site 3 must be used to observe divided signals

Signal Descriptions

Reticle Site: VCO Chip #: Date:

Personnel: