An Adaptive Clock Deskew Scheme and a 500 ps 32 by 8 bit Register File for a High Speed Digital System

by

Kyung-suc Nah

A Thesis Submitted to the Graduate

Faculty of Rensselaer Polytechnic Institute

in Partial Fulfillment of the

Requirements for the Degree of

Doctor of Philosophy

Major Subject: Electrical Engineering

 

Approved by the

Examining Committee:

 

 

_________________________

John F. McDonald, Thesis Advisor

 

_________________________ _________________________

Hans Greub, Member Gary Saulnier, Member

 

_________________________ _________________________

Gene Rymaszewski, Member Mike Savic, Member

 

Rensselaer Polytechnic Institute

Troy, New York

May 1994